search for: ds11

Displaying 4 results from an estimated 4 matches for "ds11".

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2019 Nov 20
4
Tablegen PAT limitation?
...t;ABC", [v1i16, v1f16], 16, (add &nbsp; &nbsp; IA, IB, IC, ID, IE, IF, IG, IH &nbsp; )&gt;; &nbsp; def SGPR32 : RegisterClass<"ABC", [ i32, f32 ], 32, (add &nbsp; &nbsp; DS0, DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt;...
2019 Nov 21
2
Tablegen PAT limitation?
...t;ABC", [v1i16, v1f16], 16, (add &nbsp; &nbsp; IA, IB, IC, ID, IE, IF, IG, IH &nbsp; )&gt;; &nbsp; def SGPR32 : RegisterClass<"ABC", [ i32, f32 ], 32, (add &nbsp; &nbsp; DS0, DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &a...
2019 Nov 22
2
Tablegen PAT limitation?
...t;ABC", [v1i16, v1f16], 16, (add &nbsp; &nbsp; IA, IB, IC, ID, IE, IF, IG, IH &nbsp; )&gt;; &nbsp; def SGPR32 : RegisterClass<"ABC", [ i32, f32 ], 32, (add &nbsp; &nbsp; DS0, DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp;...
2019 Nov 25
2
Tablegen PAT limitation?
...t;ABC", [v1i16, v1f16], 16, (add &nbsp; &nbsp; IA, IB, IC, ID, IE, IF, IG, IH &nbsp; )&gt;; &nbsp; def SGPR32 : RegisterClass<"ABC", [ i32, f32 ], 32, (add &nbsp; &nbsp; DS0, DS1, DS2, DS3, DS4, DS5, DS6, DS7, DS8, DS9, DS10,DS11, &nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; DS12, DS13, DS14, DS15 &nbsp; )&gt;; &nbsp; def uimm2 : Operand<i32&gt;, ImmLeaf<i32, [{return isUInt<2&gt;(Imm);}]&gt; { &nbsp; let Parse...