search for: drm_nouveau_gem_cpu_fini

This patchset proposes to introduce a "staging" module option to dynamically enable features (mostly ioctls) that are merged but may be refined before they are declared "stable". The second patch illustrates the use of this staging option with the SET_TILING ioctl, which can be used to specify the tiling options of a PRIME-imported buffer. The staging parameter will allow us

Second version of this patchset addressing Ben's comments and fixing a few extra things. This patchset proposes to introduce a "staging" module option to dynamically enable features (mostly ioctls) that are merged but may be refined before they are declared "stable". The second patch illustrates the use of this staging option with the SET_TILING ioctl, which can be used to

....h @@ -29,6 +29,10 @@ #include <drm/drm.h> +#if defined(__cplusplus) +extern "C" { +#endif + #define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) #define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) #define NOUVEAU_GEM_DOMAIN_GART (1 << 2) @@ -141,4 +145,8 @@ struct drm_nouveau_gem_cpu_fini { #define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini) #define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info) +#if defined(__cplusplus) +} +#endif...

...c:: include/uapi/drm/nouveau_drm.h >> diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h >> index 853a327433d3..f6e7d40201d4 100644 >> --- a/include/uapi/drm/nouveau_drm.h >> +++ b/include/uapi/drm/nouveau_drm.h >> @@ -126,6 +126,216 @@ struct drm_nouveau_gem_cpu_fini { >> __u32 handle; >> }; >> >> +/** >> + * struct drm_nouveau_sync - sync object >> + * >> + * This structure serves as synchronization mechanism for (potentially) >> + * asynchronous operations such as EXEC or VM_BIND. >> + */ >>...

..._EXPLICIT_SYNC 0x00040000 struct drm_nouveau_gem_info { uint32_t handle; @@ -54,7 +55,7 @@ struct drm_nouveau_gem_info { uint64_t offset; uint64_t map_handle; uint32_t tile_mode; - uint32_t tile_flags; + uint32_t bo_flags; }; struct drm_nouveau_gem_new { @@ -149,6 +150,7 @@ struct drm_nouveau_gem_cpu_fini { #define DRM_NOUVEAU_GEM_CPU_FINI 0x43 #define DRM_NOUVEAU_GEM_INFO 0x44 #define DRM_NOUVEAU_GEM_PUSHBUF_2 0x45 +#define DRM_NOUVEAU_GEM_SET_INFO 0x46 #define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_g...

...>>> diff --git a/include/uapi/drm/nouveau_drm.h >>> b/include/uapi/drm/nouveau_drm.h >>> index 853a327433d3..f6e7d40201d4 100644 >>> --- a/include/uapi/drm/nouveau_drm.h >>> +++ b/include/uapi/drm/nouveau_drm.h >>> @@ -126,6 +126,216 @@ struct drm_nouveau_gem_cpu_fini { >>> ????? __u32 handle; >>> ? }; >>> ? +/** >>> + * struct drm_nouveau_sync - sync object >>> + * >>> + * This structure serves as synchronization mechanism for >>> (potentially) >>> + * asynchronous operations such as EXEC...

...de/uapi/drm/nouveau_drm.h > diff --git a/include/uapi/drm/nouveau_drm.h > b/include/uapi/drm/nouveau_drm.h > index 853a327433d3..4d3a70529637 100644 > --- a/include/uapi/drm/nouveau_drm.h > +++ b/include/uapi/drm/nouveau_drm.h > @@ -126,6 +126,209 @@ struct drm_nouveau_gem_cpu_fini { > ? ? ? ? __u32 handle; > ?}; > > +/** > + * struct drm_nouveau_sync - sync object > + * > + * This structure serves as synchronization mechanism for (potentially) > + * asynchronous operations such as EXEC or VM_BIND. > + */ >...

...gt;>> diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h >>>> index 853a327433d3..f6e7d40201d4 100644 >>>> --- a/include/uapi/drm/nouveau_drm.h >>>> +++ b/include/uapi/drm/nouveau_drm.h >>>> @@ -126,6 +126,216 @@ struct drm_nouveau_gem_cpu_fini { >>>> __u32 handle; >>>> }; >>>> +/** >>>> + * struct drm_nouveau_sync - sync object >>>> + * >>>> + * This structure serves as synchronization mechanism for (potentially) >>>> + * asynchronous operations su...

...driver_platform = driver_stub; > diff --git a/drm/nouveau/uapi/drm/nouveau_drm.h b/drm/nouveau/uapi/drm/nouveau_drm.h > index 5507eead5863..4e7e21f41b5c 100644 > --- a/drm/nouveau/uapi/drm/nouveau_drm.h > +++ b/drm/nouveau/uapi/drm/nouveau_drm.h > @@ -140,11 +140,14 @@ struct drm_nouveau_gem_cpu_fini { > #define DRM_NOUVEAU_GEM_CPU_PREP 0x42 > #define DRM_NOUVEAU_GEM_CPU_FINI 0x43 > #define DRM_NOUVEAU_GEM_INFO 0x44 > +/* range 0x98..DRM_COMMAND_END (8 entries) is reserved for staging, unstable ioctls */ > +#define DRM_NOUVEAU_STAGING_IOCTL 0x58 >...

From: Thierry Reding <treding at nvidia.com> This small series of patches implements support for waiting on and emitting fence FDs on kickoff. This enables explicit fencing and can be used for example to synchronize buffer accesses between the display engine and the GPU on Tegra. The first patch lays the groundwork by splitting up nouveau_fence_sync() to allow reuse. Patch 2 is where the

...}; > > +struct drm_nouveau_gem_set_tiling { > + uint32_t handle; > + uint32_t tile_mode; > + uint32_t tile_flags; > +}; > + > #define NOUVEAU_GEM_MAX_BUFFERS 1024 > struct drm_nouveau_gem_pushbuf_bo_presumed { > uint32_t valid; > @@ -142,6 +148,7 @@ struct drm_nouveau_gem_cpu_fini { > #define DRM_NOUVEAU_GEM_INFO 0x44 > /* range 0x98..DRM_COMMAND_END (8 entries) is reserved for staging, unstable ioctls */ > #define DRM_NOUVEAU_STAGING_IOCTL 0x58 > +#define DRM_NOUVEAU_GEM_SET_TILING (DRM_NOUVEAU_STAGING_IOCTL + 0x0) > > #define DR...

...t; }; > > +struct drm_nouveau_gem_set_tiling { > + uint32_t handle; > + uint32_t tile_mode; > + uint32_t tile_flags; > +}; > + > #define NOUVEAU_GEM_MAX_BUFFERS 1024 > struct drm_nouveau_gem_pushbuf_bo_presumed { > uint32_t valid; > @@ -142,6 +148,7 @@ struct drm_nouveau_gem_cpu_fini { > #define DRM_NOUVEAU_GEM_INFO 0x44 > /* range 0x98..DRM_COMMAND_END (8 entries) is reserved for staging, unstable ioctls */ > #define DRM_NOUVEAU_STAGING_IOCTL 0x58 > +#define DRM_NOUVEAU_GEM_SET_TILING (DRM_NOUVEAU_STAGING_IOCTL + 0x0) > > #define DRM_...

...oc(nvbo, NULL); @@ -470,6 +473,9 @@ nouveau_bo_unmap(struct nouveau_bo *bo) { struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + if(--nvbo->map_count) + return 0; + if (bo->map && !nvbo->sysmem) { struct nouveau_device_priv *nvdev = nouveau_device(bo->device); struct drm_nouveau_gem_cpu_fini req; diff --git a/nouveau/nouveau_private.h b/nouveau/nouveau_private.h index 39758d1..512bc1e 100644 --- a/nouveau/nouveau_private.h +++ b/nouveau/nouveau_private.h @@ -115,6 +115,7 @@ struct nouveau_bo_priv { drm_handle_t handle; uint64_t map_handle; void *map; + unsigned map_count; /*...

Hi guys, I'd like to start a new thread about explicit fence synchronization. This time with a Nouveau twist. :-) First, let me define what I understand by implicit/explicit sync: Implicit synchronization * Fences are attached to buffers * Kernel manages fences automatically based on buffer read/write access Explicit synchronization * Fences are passed around independently * Kernel takes

...t grclass; + } subchan[8]; + uint32_t nr_subchan; +}; + +struct drm_nouveau_channel_free { + int channel; +}; + #define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) #define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) #define NOUVEAU_GEM_DOMAIN_GART (1 << 2) @@ -126,10 +164,10 @@ struct drm_nouveau_gem_cpu_fini { __u32 handle; }; -#define DRM_NOUVEAU_GETPARAM 0x00 /* deprecated */ +#define DRM_NOUVEAU_GETPARAM 0x00 #define DRM_NOUVEAU_SETPARAM 0x01 /* deprecated */ -#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 /* deprecated */ -#define DRM_NOUVEAU_CHANNEL_FREE 0x03...

From: Thierry Reding <treding at nvidia.com> Hi, This series implements a new IOCTL to submit push buffers that can optionally return a sync FD or sync object to userspace. This is useful in cases where userspace wants to synchronize operations between the GPU and another driver (such as KMS for display). Among other things this allows extensions such as eglDupNativeFenceFDANDROID to be

...true, no_wait); spin_unlock(&nvbo->bo.bdev->fence_lock); + nouveau_bo_sync_for_cpu(nvbo); drm_gem_object_unreference_unlocked(gem); return ret; } @@ -904,6 +905,17 @@ int nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data, struct drm_file *file_priv) { + struct drm_nouveau_gem_cpu_fini *req = data; + struct drm_gem_object *gem; + struct nouveau_bo *nvbo; + + gem = drm_gem_object_lookup(dev, file_priv, req->handle); + if (!gem) + return -ENOENT; + nvbo = nouveau_gem_object(gem); + + nouveau_bo_sync_for_device(nvbo); + drm_gem_object_unreference_unlocked(gem); return 0; }...

Hi all, As some of you may know there some subtle distinction between C and C++ structs, thus one should wrap/annotate them roughly like below. ... #if defined(__cplusplus) extern "C" { #endif struct foo { int bar; ... }; ... #if defined(__cplusplus) } #endif In order to work around the lack of these users can wrap the header inclusion in the same way. For example:

Hi there, Resending these now that they've had some more polish and testing, and I heard that Ben's vacation is over :-) These patches work as a starting point for more explicit error mechanisms and better robustness. At the moment, when a job hangs or faults, it seems that nouveau doesn't quite know how to handle the situation and often results in a hang. Some of these situations

...PUSHBUF_CALL, nouveau_gem_ioctl_pushbuf_call, DRM_AUTH), - DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PIN, nouveau_gem_ioctl_pin, DRM_AUTH), - DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_UNPIN, nouveau_gem_ioctl_unpin, DRM_AUTH), DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH), DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH), DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH), diff -Naur a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c --- a/drivers/gpu/drm/nouveau/nouveau_mem.c 2010-01-18 12:48:59.522122876 +0100 +++ b/drivers/g...