search for: drm_mode_addfb

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also set the quirk_addfb_prefer_host_byte_order mode_config bit so drm_mode_addfb() asks for the correct format code. Both DRM_FORMAT_* and VIRTIO_GPU_FORMAT_* are defined to be little endian, so using a different mapping on bigendian machines is wrong. It's there because of broken drm_mode_addfb() behavior. So with drm_mode_addfb() being fixed we can fix this too. While...

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also set the quirk_addfb_prefer_host_byte_order mode_config bit so drm_mode_addfb() asks for the correct format code. Both DRM_FORMAT_* and VIRTIO_GPU_FORMAT_* are defined to be little endian, so using a different mapping on bigendian machines is wrong. It's there because of broken drm_mode_addfb() behavior. So with drm_mode_addfb() being fixed we can fix this too. While...

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also add DRIVER_PREFER_HOST_BYTE_ORDER driver feature flag so drm_mode_addfb() asks for the correct format code. Both DRM_FORMAT_* and VIRTIO_GPU_FORMAT_* are defined to be little endian, so using a different mapping on bigendian machines is wrong. It's there because of broken drm_mode_addfb() behavior. So with drm_mode_addfb() being fixed we can fix this too. While...

...* * @async_page_flip: Does this device support async flips on the primary diff --git a/drivers/gpu/drm/drm_framebuffer.c b/drivers/gpu/drm/drm_framebuffer.c index 781af1d42d..17b7b8944d 100644 --- a/drivers/gpu/drm/drm_framebuffer.c +++ b/drivers/gpu/drm/drm_framebuffer.c @@ -120,8 +120,8 @@ int drm_mode_addfb(struct drm_device *dev, struct drm_mode_fb_cmd *or, r.pixel_format = drm_mode_legacy_fb_format(or->bpp, or->depth); r.handles[0] = or->handle; - if (r.pixel_format == DRM_FORMAT_XRGB2101010 && - dev->driver->driver_features & DRIVER_PREFER_XBGR_30BPP) + if (dev-...

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also set the quirk_addfb_prefer_host_byte_order mode_config bit so drm_mode_addfb() asks for the correct format code. Create our own plane and use drm_crtc_init_with_planes() instead of depending on the default created by drm_crtc_init(). That way the plane format list is correct on bigendian machines. Also re-add the framebuffer format check dropped by "df2052cc92 bochs...

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also set the quirk_addfb_prefer_host_byte_order mode_config bit so drm_mode_addfb() asks for the correct format code. Create our own plane and use drm_crtc_init_with_planes() instead of depending on the default created by drm_crtc_init(). That way the plane format list is correct on bigendian machines. With this patch applied both ADDFB and ADDFB2 ioctls work correctly in the...

Use DRM_FORMAT_HOST_XRGB8888, so we are using the correct format code on bigendian machines. Also add DRIVER_PREFER_HOST_BYTE_ORDER driver feature flag so drm_mode_addfb() asks for the correct format code. Create our own plane and use drm_crtc_init_with_planes() instead of depending on the default created by drm_crtc_init(). That way the plane format list is correct on bigendian machines. With this patch applied both ADDFB and ADDFB2 ioctls work correctly in the...

https://bugs.freedesktop.org/show_bug.cgi?id=69465 Priority: medium Bug ID: 69465 Assignee: nouveau at lists.freedesktop.org Summary: Kernel freeze with NVA3 kernel 3.11.1 / PGRAPH][0000:01:00.0] PGRAPH TLB flush idle timeout fail QA Contact: xorg-team at lists.x.org Severity: critical

On 01/26/2016 03:24 PM, Ilia Mirkin wrote: > sleep 1 && xset dpms force off Could you confirm exactly how to add the drm.debug=0x1e option. Is it another parameter on the kernel command line? Where does the output data go? Is there a way to get it into a file? Thanks Don

...[ 43.580317] nouveau E[ PGRAPH][0000:01:00.0] 51a000 - stat 0x00000000 0x00000000 0x00000000 0x00000000 [ 43.580323] nouveau E[ PGRAPH][0000:01:00.0] 51a000 - stat 0x00000000 0x00000000 0x00000000 0x00000000 [ 43.580325] nouveau E[ PGRAPH][0000:01:00.0] init failed, -16 [ 43.610207] [drm:drm_mode_addfb] [FB:46] [ 43.610221] [drm:drm_mode_setcrtc] [CRTC:15] [ 43.610224] [drm:drm_mode_setcrtc] [CONNECTOR:22:LVDS-1] [ 43.610225] [drm:drm_crtc_helper_set_config] [ 43.610226] [drm:drm_crtc_helper_set_config] [CRTC:15] [FB:46] #connectors=1 (x y) (0 0) [ 43.610230] [drm:drm_crtc_helper_set_c...

...(DRM_IOCTL_MODE_GETPROPBLOB, drm_mode_getblob_ioctl, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB, drm_mode_getfb, DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB2, drm_mode_getfb2, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB, drm_mode_addfb, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB2, drm_mode_addfb2, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_RMFB, drm_mode_rmfb, DRM_CONTROL_ALLOW|DRM_UNLOCKED), diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb....

Hi all, First thing first: It works, I now no longer have a few dropped frames every 10s on my testbox here with the pageflip i-g-t tests. Random notes: - New design has per-crtc locks to protect the crtc input-side (pageflip, cursor) for r/w and the output state of the crtc (mode, dpms) as read-only. It also required completely revamped fb lifecycle management, those are now refcounted

...e], Modeline 47:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [ 6.006893] [drm:drm_mode_debug_printmodeline], Modeline 48:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [ 6.008190] [drm:drm_mode_getconnector], [CONNECTOR:13:?] [ 6.030361] [drm:drm_mode_addfb], [FB:51] [ 25.606410] [drm:drm_crtc_helper_set_config], [ 25.606416] [drm:drm_crtc_helper_set_config], [CRTC:10] [FB:50] #connectors=1 (x y) (0 0) [ 25.606433] [drm:drm_crtc_helper_set_config], [CONNECTOR:13:LVDS-1] to [CRTC:10] [ 25.869762] nouveau D[plymouthd[128]] fini running [ 25.8...

> On Tue, Apr 01, 2014 at 02:53:02PM -0400, Ilia Mirkin wrote: >I believe that ch7006 is the only external encoder that's supposed to >work, so you're in luck. It sounds like it passes the nv04_tv_identify >stage of nv04_tv_create -- perhaps it fails later? Although based on >the prints, it's even doing dpms stuff (but it hits _detect a second >time... odd). Try