search for: drm_dp_downstream_max_clock

...ll check for DP_DETAILED_CAP_INFO_AVAILABLE anyway. * Fix ret code check for drm_dp_dpcd_read v5: * Change name from drm_dp_downstream_read_info() to drm_dp_read_downstream_info() * Also, add "See Also" sections for the various downstream info functions (drm_dp_read_downstream_info(), drm_dp_downstream_max_clock(), drm_dp_downstream_max_bpc()) Reviewed-by: Sean Paul <sean at poorly.run> Signed-off-by: Lyude Paul <lyude at redhat.com> squash! drm/i915/dp: Extract drm_dp_read_downstream_info() Signed-off-by: Lyude Paul <lyude at redhat.com> --- drivers/gpu/drm/drm_dp_helper.c...

...;s supposed to happen if dpcd[DP_DOWN_STREAM_PORT_COUNT] is > 4? Sean > + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, > + len); > + > + return ret == len ? 0 : -EIO; > +} > +EXPORT_SYMBOL(drm_dp_downstream_read_info); > + > /** > * drm_dp_downstream_max_clock() - extract branch device max > * pixel rate for legacy VGA > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 1e29d3a012856..984e49194ca31 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c >...

...or_status_disconnected; + return connector_status_connected; } @@ -176,8 +181,6 @@ void nouveau_dp_irq(struct nouveau_drm *drm, /* TODO: * - Use the minimum possible BPC here, once we add support for the max bpc * property. - * - Validate the mode against downstream port caps (see - * drm_dp_downstream_max_clock()) * - Validate against the DP caps advertised by the GPU (we don't check these * yet) */ @@ -188,15 +191,19 @@ nv50_dp_mode_valid(struct drm_connector *connector, unsigned *out_clock) { const unsigned min_clock = 25000; - unsigned max_clock, clock; + unsigned max_clock, ds_clo...

...& DP_DWN_STRM_PORT_PRESENT)) + return 0; + + len = (dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK) * 4; + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, + len); + + return ret == len ? 0 : -EIO; +} +EXPORT_SYMBOL(drm_dp_downstream_read_info); + /** * drm_dp_downstream_max_clock() - extract branch device max * pixel rate for legacy VGA diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 1e29d3a012856..984e49194ca31 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i9...

...dpcd); + if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE) + len *= 4; + + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, len); + if (ret < 0) + return ret; + + return ret == len ? 0 : -EIO; +} +EXPORT_SYMBOL(drm_dp_downstream_read_info); + /** * drm_dp_downstream_max_clock() - extract branch device max * pixel rate for legacy VGA diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 1e29d3a012856..984e49194ca31 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i9...

...+ ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, > > > + len); > > > + > > > + return ret == len ? 0 : -EIO; > > > +} > > > +EXPORT_SYMBOL(drm_dp_downstream_read_info); > > > + > > > /** > > > * drm_dp_downstream_max_clock() - extract branch device max > > > * pixel rate for legacy VGA > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > > b/drivers/gpu/drm/i915/display/intel_dp.c > > > index 1e29d3a012856..984e49194ca31 100644 > >...

...port types. > Sean > > > + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, > > + len); > > + > > + return ret == len ? 0 : -EIO; > > +} > > +EXPORT_SYMBOL(drm_dp_downstream_read_info); > > + > > /** > > * drm_dp_downstream_max_clock() - extract branch device max > > * pixel rate for legacy VGA > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > b/drivers/gpu/drm/i915/display/intel_dp.c > > index 1e29d3a012856..984e49194ca31 100644 > > --- a/drivers/gpu/dr...

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

...; > > downstream_ports, > > > > + len); > > > > + > > > > + return ret == len ? 0 : -EIO; > > > > +} > > > > +EXPORT_SYMBOL(drm_dp_downstream_read_info); > > > > + > > > > /** > > > > * drm_dp_downstream_max_clock() - extract branch device max > > > > * pixel rate for legacy VGA > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > > > b/drivers/gpu/drm/i915/display/intel_dp.c > > > > index 1e29d3a012856..984e49194ca...

...: in the kdocs, but I didn't bother pointing all of them > out), all but patch 07 is: > > Reviewed-by: Lyude Paul <lyude at redhat.com> Thanks for the review. I fixed up the missing/bad docs and pushed the lot to drm-intel-next-queued (with Daniel's irc ack). PS. Had to s/drm_dp_downstream_max_clock/drm_dp_downstream_max_dotclock/ in nouveau_dp.c to keep it in a buildable shape. I hope I didn't step on too many toes with this... -- Ville Syrj?l? Intel

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually