Displaying 3 results from an estimated 3 matches for "dpp_control".
2017 Jun 15
2
Implementing cross-thread reduction in the AMDGPU backend
...te of adding a dpp intrinsic for every operation
if it gives you functionality that you can't get with the llvm.amdgcn.update.dpp.
The main reason for this is that you will lose the generic combines that
LLVM has for add, min, etc.
-Tom
> %new = f32 llvm.amdgcn.fmin_dpp %old, %src0, %src1 (dpp_control)
>
> turns into:
>
> v_mov_b32 %new, %old
> v_min_f32 %new, %src0, %src1 (dpp_control)
>
> and then we can get what we want directly, without have to do much
> optimization except for coalescing that already exists. The downside
> is that we'd have to add a lot mor...
2017 Jun 15
1
Implementing cross-thread reduction in the AMDGPU backend
...ou will lose the generic combines
> that LLVM has for add, min, etc.
Ok, good point. I think this is only going to be used in a few specific scenarios, but I can see stuff like fusing add + into mad being useful.
>
>
> -Tom
>> %new = f32 llvm.amdgcn.fmin_dpp %old, %src0, %src1 (dpp_control)
>>
>> turns into:
>>
>> v_mov_b32 %new, %old
>> v_min_f32 %new, %src0, %src1 (dpp_control)
>>
>> and then we can get what we want directly, without have to do much
>> optimization except for coalescing that already exists. The downside
>> is...
2017 Jun 14
5
Implementing cross-thread reduction in the AMDGPU backend
On 06/13/2017 07:33 PM, Matt Arsenault wrote:
>
>> On Jun 12, 2017, at 17:23, Tom Stellard <tstellar at redhat.com <mailto:tstellar at redhat.com>> wrote:
>>
>> On 06/12/2017 08:03 PM, Connor Abbott wrote:
>>> On Mon, Jun 12, 2017 at 4:56 PM, Tom Stellard <tstellar at redhat.com <mailto:tstellar at redhat.com>> wrote:
>>>> On