search for: dp_dpcd_rev

On Tue, Aug 11, 2020 at 04:04:56PM -0400, Lyude Paul wrote: > Since DP 1.3, it's been possible for DP receivers to specify an > additional set of DPCD capabilities, which can take precedence over the > capabilities reported at DP_DPCD_REV. > > Basically any device supporting DP is going to need to read these in an > identical manner, in particular nouveau, so let's go ahead and just move > this code out of i915 into a shared DRM DP helper that we can use in > other drivers. > > Signed-off-by: Lyude Paul &l...

Since DP 1.3, it's been possible for DP receivers to specify an additional set of DPCD capabilities, which can take precedence over the capabilities reported at DP_DPCD_REV. Basically any device supporting DP is going to need to read these in an identical manner, in particular nouveau, so let's go ahead and just move this code out of i915 into a shared DRM DP helper that we can use in other drivers. Signed-off-by: Lyude Paul <lyude at redhat.com> --- driv...

....aux; + u8 dpcd_ext[DP_RECEIVER_CAP_SIZE]; + int ret; + + ret = nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dp.dpcd, DP_RECEIVER_CAP_SIZE); + if (ret < 0) + return ret; + + /* + * Prior to DP1.3 the bit represented by + * DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved. + * If it is set DP_DPCD_REV at 0000h could be at a value less than + * the true capability of the panel. The only way to check is to + * then compare 0000h and 2200h. + */ + if (!(outp->dp.dpcd[DP_TRAINING_AUX_RD_INTERVAL] & + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT)) + return 0; + + ret = nvkm_rdaux(aux, DP_D...

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

...d81c25244 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -44,7 +44,6 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector, struct nv50_mstm *mstm = NULL; int ret; u8 *dpcd = outp->dp.dpcd; - u8 tmp; ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE); if (ret == DP_RECEIVER_CAP_SIZE && dpcd[DP_DPCD_REV]) { @@ -56,19 +55,10 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector, return connector_status_disconnected; } - if (nouveau_mst) + if (nouveau_mst) { mstm = outp->dp.mstm; - - if...

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

...onst u8 dpcd[DP_RECEIVER_CAP_SIZE], > + u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]) > +{ > + int ret; > + u8 len; > + > + memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS); > + > + /* No downstream info to read */ > + if (!drm_dp_is_branch(dpcd) || > + dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 || > + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) > + return 0; > + > + len = (dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK) * 4; I'm having a hard time rationalizing DP_MAX_DOWNSTREAM_PORTS being 16, but only having 4 p...

...*/ int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr) { - int ret = 0; + int ret; + u8 guid[16]; mutex_lock(&mgr->lock); + if (!mgr->mst_primary) + goto out_fail; - if (mgr->mst_primary) { - int sret; - u8 guid[16]; + ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, + DP_RECEIVER_CAP_SIZE); + if (ret != DP_RECEIVER_CAP_SIZE) { + DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n"); + goto out_fail; + } - sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE); - if (sret != DP_RECE...

...au/nouveau_dp.c index f41fa513023fd..a4e07d116972f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -55,15 +55,13 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector, int ret; u8 *dpcd = outp->dp.dpcd; - ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE); - if (ret == DP_RECEIVER_CAP_SIZE && dpcd[DP_DPCD_REV]) { - ret = drm_dp_read_desc(aux, &outp->dp.desc, - drm_dp_is_branch(dpcd)); - if (ret < 0) - goto out; - } else { + ret = drm_dp_read_dpcd_caps(aux, dpcd); + if (ret < 0) + goto...

...12856 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4699,20 +4699,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) return true; } -static bool -intel_dp_sink_can_mst(struct intel_dp *intel_dp) -{ - u8 mstm_cap; - - if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) - return false; - - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1) - return false; - - return mstm_cap & DP_MST_CAP; -} - static bool intel_dp_can_mst(struct intel_dp *intel_dp) { @@ -4720,7 +4706,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)...

...12856 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4699,20 +4699,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) return true; } -static bool -intel_dp_sink_can_mst(struct intel_dp *intel_dp) -{ - u8 mstm_cap; - - if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) - return false; - - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1) - return false; - - return mstm_cap & DP_MST_CAP; -} - static bool intel_dp_can_mst(struct intel_dp *intel_dp) { @@ -4720,7 +4706,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)...

...s MST + * @aux: The DP AUX channel to use + * @dpcd: A cached copy of the DPCD capabilities for this sink + * + * Returns: %True if the sink supports MST, %false otherwise + */ +bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, + const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +{ + u8 mstm_cap; + + if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12) + return false; + + if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1) + return false; + + return mstm_cap & DP_MST_CAP; +} +EXPORT_SYMBOL(drm_dp_read_mst_cap); + /** * drm_dp_mst_topology_mgr_set_mst() - Set the MST state for a topology manager * @mgr: ma...

...ownstream_read_info(struct drm_dp_aux *aux, + const u8 dpcd[DP_RECEIVER_CAP_SIZE], + u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]) +{ + int ret; + u8 len; + + memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS); + + /* No downstream info to read */ + if (!drm_dp_is_branch(dpcd) || + dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 || + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) + return 0; + + len = (dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK) * 4; + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports, + len); + + return ret == len ? 0 :...

...bool drm_dp_has_sink_count(struct drm_connector *connector, + const u8 dpcd[DP_RECEIVER_CAP_SIZE], + const struct drm_dp_desc *desc) +{ + /* Some eDP panels don't set a valid value for the sink count */ + return connector->connector_type != DRM_MODE_CONNECTOR_eDP && + dpcd[DP_DPCD_REV] >= DP_DPCD_REV_11 && + dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && + !drm_dp_has_quirk(desc, 0, DP_DPCD_QUIRK_NO_SINK_COUNT); +} +EXPORT_SYMBOL(drm_dp_has_sink_count); + /* * I2C-over-AUX implementation */ diff --git a/drivers/gpu/drm/i915/display/in...

...*nv_encoder) struct nouveau_drm *drm = nouveau_drm(dev); struct nvkm_i2c_aux *aux; u8 dpcd[8]; + u8 port_cap[DP_MAX_DOWNSTREAM_PORTS] = {}; int ret; aux = nv_encoder->aux; @@ -72,6 +73,14 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder) if (ret) return ret; + if (dpcd[DP_DPCD_REV] > 0x10) { + ret = nvkm_rdaux(aux, DP_DOWNSTREAM_PORT_0, + port_cap, DP_MAX_DOWNSTREAM_PORTS); + if (ret) + memset(port_cap, 0, DP_MAX_DOWNSTREAM_PORTS); + } + nv_encoder->dp.subconnector = drm_dp_subconnector_type(dpcd, port_cap); + nv_encoder->dp.link_bw = 27000 * dpcd[1]; nv...

...ownstream_read_info(struct drm_dp_aux *aux, + const u8 dpcd[DP_RECEIVER_CAP_SIZE], + u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]) +{ + int ret; + u8 len; + + memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS); + + /* No downstream info to read */ + if (!drm_dp_is_branch(dpcd) || + dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 || + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) + return 0; + + len = drm_dp_downstream_port_count(dpcd); + if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE) + len *= 4; + + ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0,...

...*nv_encoder) struct nouveau_drm *drm = nouveau_drm(dev); struct nvkm_i2c_aux *aux; u8 dpcd[8]; + u8 port_cap[DP_MAX_DOWNSTREAM_PORTS] = {}; int ret; aux = nv_encoder->aux; @@ -72,6 +73,14 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder) if (ret) return ret; + if (dpcd[DP_DPCD_REV] > 0x10) { + ret = nvkm_rdaux(aux, DP_DOWNSTREAM_PORT_0, + port_cap, DP_MAX_DOWNSTREAM_PORTS); + if (ret) + memset(port_cap, 0, DP_MAX_DOWNSTREAM_PORTS); + } + nv_encoder->dp.subconnector = drm_dp_subconnector_type(dpcd, port_cap); + nv_encoder->dp.link_bw = 27000 * dpcd[1]; nv...

...) > > > +{ > > > + int ret; > > > + u8 len; > > > + > > > + memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS); > > > + > > > + /* No downstream info to read */ > > > + if (!drm_dp_is_branch(dpcd) || > > > + dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 || > > > + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) > > > + return 0; > > > + > > > + len = (dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK) * 4; > > > > I'm having a hard time rationa...