Displaying 2 results from an estimated 2 matches for "dominstrated".
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2013 Sep 24
0
[LLVMdev] MI Scheduler Update (was Experimental Evaluation of the Schedulers in LLVM 3.3)
...gh. Complicating the heuristics now also means making them harder to understand and improve in the future.
I would like to see a general solution to scheduling for register pressure. I had plenty of ideas for more ad-hoc heuristcs within the bounds of list scheduling, but given that we haven't dominstrated the value of simple heuristics, I don't want to pursue anything more complicated. I think better solutions will have to transcend list scheduling. I do like to the idea of constraining the DAG prior to scheduling [Touati, "Register Saturation in Superscalar and VLIW Codes", CC 2001],...
2013 Sep 17
11
[LLVMdev] Experimental Evaluation of the Schedulers in LLVM 3.3
Hi Andy,
We have done some experimental evaluation of the different schedulers in LLVM 3.3 (source, BURR, ILP, fast, MI). The evaluation was done
on x86-64 using SPEC CPU2006. We have measured both the amount of spill code as
well as the execution time as detailed below.
Here are our main findings:
1. The SD schedulers significantly impact the spill counts and the execution
times for many