Displaying 5 results from an estimated 5 matches for "dodohack".
2009 Jun 04
1
[LLVMdev] endian issue of llvm-gcc and llvm backend
...9;ed big endian
code = little endian code, am I right?
If I want to generate correct asm code for big endian? what should I do?
I have tried to generate big endian asm code from little endian IR by giving
-march option to llc to force the target to big endian, but this seems to be
unworkable!
--
dodohack at ybu
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2009 Jun 05
0
[LLVMdev] endian issue of llvm-gcc and llvm backend
...lems though so it may be a
> bug in the ARM backend. The ARM backend is considered to be experimental at
> this point so it is likely to have incorrect code in it.
>
> I hope I answered your question well enough,
>
> --Sam
> ________________________________
> From: dodo <dodohack at gmail.com>
> To: llvmdev at cs.uiuc.edu
> Sent: Thursday, June 4, 2009 3:14:28 AM
> Subject: [LLVMdev] endian issue of llvm-gcc and llvm backend
>
> Hi, all
>
> As I'm a Chinese, be patient of my poor description below.
>
> I compiled libgcc into llvm bitcode in...
2012 Apr 18
0
[LLVMdev] Conceptual difference between "Unallocatable" and "Reserved" registers.
.../EBP are defined as
*allocatable but reserved *(in X86RegisterInfo.cpp).
Since these registers also have special usage, why not specify them as
*unallocatable,
instead of allocatable but reserved?* I hope I made myself clear. Thanks.
Regards,
Lei Mou
On Wed, Apr 18, 2012 at 12:38 PM, AriesWu <dodohack at gmail.com> wrote:
> such as sp, fp for x86 are reserved registers, it means you should not use
> it as general purpose.
>
> On 18 April 2012 12:09, Lei Mou <lei.mou.uu at gmail.com> wrote:
>
>> Hi,
>>
>> I'm writing to ask the differences between a...
2012 Jan 24
0
[LLVMdev] Resolving branch instr with label "$BB0_-1"
May be you have branched to a BB which has been deleted.
On 24 January 2012 20:16, girish gulawani <girishvg at yahoo.com> wrote:
>
> Hello All.
> On a particular target the back-end generates an instruction like:
> beqz r2, "$BB0_-1"
>
> Is it a back-end specific issue? Could someone please help me figure out
> how this gets resolved? What confuses me
2010 Mar 04
1
[LLVMdev] Struct parameter
Hi, guys,
If there is a struct {i8, i8, i32}, and there are several parameter
GPRs(32bits), say, r0, r1~r5, I can make this struct to be passed in r0, r1
because LLVM_SHOULD_PASS_AGGREGATE_IN_INTEGER_REGS is true in DefaultABI,
neither it passed by value, nor it passed as FCA.
But if the first parameter register r0 is occupied by other argument, in
DefaultABI, that struct passed as a i64, and