Displaying 4 results from an estimated 4 matches for "dniso".
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dnis
2017 Jan 05
1
[PATCH] drm/nouveau: fix bug id typo in comment
...((ram->base.size - (ram->poller_base + 0x40)) >> 5) - 1;
/* Enable NISO poller for various clients and set their associated
- * read address, only for MCP77/78 and MCP79/7A. (fd#25701)
+ * read address, only for MCP77/78 and MCP79/7A. (fd#27501)
*/
nvkm_wr32(device, 0x100c18, dniso);
nvkm_mask(device, 0x100c14, 0x00000000, 0x00000001);
--
2.10.2
2014 Dec 01
1
Questions about some PFB registers on NVAC cards
...ory
> > transactions.)
> >
> > There are actually three important bits in that register, which
> > control three
> > pollers:
> >
> > NV_PFB_NISO_POLLER_CFG
> > 0x00100c14
> > NV_PFB_NISO_POLLER_CFG_DNISO_ENABLE
> > 0:0
> > NV_PFB_NISO_POLLER_CFG_DNISO_ENABLE_DISABLED
> > 0x00000000
> > NV_PFB_NISO_POLLER_CFG_DNISO_ENABLE_ENABLED
> > 0x00000001
> > NV_PFB_NISO_POLLER_CFG_HO...
2014 Oct 21
3
Questions about some PFB registers on NVAC cards
(Sending it to the correct Nvidia mailing list, sorry for the spam)
Hi,
When using acceleration with Nouveau on MacBook Pros with an 9400M (NVAC) card,
a PFIFO interrupt 0x00400000 is thrown during the initialisation of that card
(sometime after PFIFO and PGRAPH initialisation) and the laptop will lockup [1],
forcing users to load Nouveau without acceleration.
After some investigation, I found
2014 Dec 11
1
[PATCH v3 2/2] fb/nvaa: Enable non-isometric poller on NVAA/NVAC
On Wed, Dec 10, 2014 at 5:53 PM, Pierre Moreau <pierre.morrow at free.fr> wrote:
> (This is a v3 of patch "drm/nouveau/fb/nv50: Add PFB writes")
>
> This fix a GPU lockup on 9400M (NVAC) when using acceleration, see
> https://bugs.freedesktop.org/show_bug.cgi?id=27501
>
> v2:
> - Move code to subdev/fb/nv50.c as suggested by Roy Spliet;
> - Remove arbitrary