Displaying 6 results from an estimated 6 matches for "dma_pag".
Did you mean:
dma_page
2024 Oct 15
5
[PATCH v1 0/4] GPU Direct RDMA (P2P DMA) for Device Private Pages
From: Yonatan Maman <Ymaman at Nvidia.com>
This patch series aims to enable Peer-to-Peer (P2P) DMA access in
GPU-centric applications that utilize RDMA and private device pages. This
enhancement is crucial for minimizing data transfer overhead by allowing
the GPU to directly expose device private page data to devices such as
NICs, eliminating the need to traverse system RAM, which is the
2018 May 10
4
kernel spew from nouveau/ swiotlb
Greetings,
When box is earning its keep, nouveau/swiotlb grumble.. a LOT. The
below is from master.today.
[12594.640959] nouveau 0000:01:00.0: swiotlb buffer is full (sz: 2097152 bytes)
[12594.693000] nouveau 0000:01:00.0: swiotlb buffer is full (sz: 2097152 bytes)
[12594.713787] nouveau 0000:01:00.0: swiotlb buffer is full (sz: 2097152 bytes)
[12594.743413] nouveau 0000:01:00.0: swiotlb buffer
2018 May 10
0
kernel spew from nouveau/ swiotlb
...Or should ttm perhaps always use the one on hand? (seems to work)
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -342,7 +342,7 @@ static struct dma_page *__ttm_dma_alloc_
if (!d_page)
return NULL;
- if (pool->type & IS_HUGE)
+ if (1 || pool->type & IS_HUGE)
attrs = DMA_ATTR_NO_WARN;
vaddr = dma_alloc_attrs(pool->dev, pool->size, &d_page->dma,
2018 May 11
2
kernel spew from nouveau/ swiotlb
...ong enough for spew to start...
> ---
> drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> @@ -342,7 +342,7 @@ static struct dma_page *__ttm_dma_alloc_
> if (!d_page)
> return NULL;
>
> - if (pool->type & IS_HUGE)
> + if (1 || pool->type & IS_HUGE)
> attrs = DMA_ATTR_NO_WARN;
>
> vaddr = dma_alloc_attrs(pool->dev, pool->size, &d_page->dma,
While IS_HUGE is indeed...
2014 Jul 08
8
[PATCH v4 0/6] drm: nouveau: memory coherency on ARM
Another revision of this patchset critical for GK20A to operate.
Previous attempts were exclusively using either TTM's regular page allocator or
the DMA API one. Both have their advantages and drawbacks: the page allocator is
fast but requires explicit synchronization on non-coherent architectures,
whereas the DMA allocator always returns coherent memory, but is also slower,
creates a
2020 Aug 19
39
a saner API for allocating DMA addressable pages
Hi all,
this series replaced the DMA_ATTR_NON_CONSISTENT flag to dma_alloc_attrs
with a separate new dma_alloc_pages API, which is available on all
platforms. In addition to cleaning up the convoluted code path, this
ensures that other drivers that have asked for better support for
non-coherent DMA to pages with incurring bounce buffering over can finally
be properly supported.
I'm still a