search for: diss2

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2011 Oct 22
0
[LLVMdev] Instruction Scheduling Itineraries
...unit 1 >>>>>> +def IFTH2 : FuncUnit; // Fetch unit 2 >>>>>> +def PDCD1 : FuncUnit; // Decode unit 1 >>>>>> +def PDCD2 : FuncUnit; // Decode unit 2 >>>>>> +def DISS1 : FuncUnit; // Issue unit 1 >>>>>> +def DISS2 : FuncUnit; // Issue unit 2 >>>>>> +def LRACC : FuncUnit; // Register access and dispatch for >>>>>> + // the simple integer (J-pipe) and >>>>>> + // load/store (L-pipe) pipelines >>>>&gt...
2010 Dec 26
4
how to replace my double for loop which is little efficient!
...s 202 samples, and 263 independent variables num.compd<-nrow(x); # number of compounds diss.all<-0 for( i in 1:num.compd) for (j in 1:num.compd) if (i!=j) { S1<-sum(x[i,]*x[j,]) S2<-sum(x[i,]^2) S3<-sum(x[j,]^2) sim2<-S1/(S2+S3-S1) diss2<-1-sim2 diss.all<-diss.all+diss2} it will cost a long time to finish this computation! i really need "rapid" code to replace my code. thanks kevin -- View this message in context: http://r.789695.n4.nabble.com/how-to-replace-my-double-for-loop-which-is-little-efficient...
2011 Dec 14
0
[LLVMdev] Help with hazards
...not immediately available, and either is the result of the add. The loads are covered by the itinerary: InstrItinData<LdStLFD , [InstrStage<1, [IFTH1, IFTH2]>, InstrStage<1, [PDCD1, PDCD2]>, InstrStage<1, [DISS1, DISS2]>, InstrStage<1, [LRACC]>, InstrStage<1, [AGEN]>, InstrStage<1, [CRD]>, InstrStage<2, [LWB]>], [9, 5, 5],...