Displaying 6 results from an estimated 6 matches for "displacementsize".
2010 Dec 16
1
[LLVMdev] x86 disassembler: if-statement with redundant branch
...llvm-2.8.orig/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c 2010-05-06 22:59:00.000000000 +0200
+++ llvm-2.8/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c 2010-12-16 16:24:28.583323293 +0100
@@ -412,11 +412,6 @@
insn->addressSize = (hasAdSize ? 4 : 8);
insn->displacementSize = 4;
insn->immediateSize = 4;
- } else if (insn->rexPrefix) {
- insn->registerSize = (hasOpSize ? 2 : 4);
- insn->addressSize = (hasAdSize ? 4 : 8);
- insn->displacementSize = (hasOpSize ? 2 : 4);
- insn->immediateSize = (ha...
2013 Sep 12
1
[LLVMdev] [patch] remove redundant code in X86DisassemblerDecoder.c
...ex 20e61da..3932ea1 100644
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@@ -550,11 +550,6 @@ static int readPrefixes(struct InternalInstruction*
insn) {
insn->addressSize = (hasAdSize ? 4 : 8);
insn->displacementSize = 4;
insn->immediateSize = 4;
- } else if (insn->rexPrefix) {
- insn->registerSize = (hasOpSize ? 2 : 4);
- insn->addressSize = (hasAdSize ? 4 : 8);
- insn->displacementSize = (hasOpSize ? 2 : 4);
- insn->immediateSize = (ha...
2014 Mar 31
2
[LLVMdev] registerSize on X86 confused?
Hi,
In file X86DisassemblerDecoder.c, we have function readPrefixes() with
below code:
.....
} else if (insn->mode == MODE_32BIT) {
insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 2 : 4);
insn->displacementSize = (hasAdSize ? 2 : 4);
insn->immediateSize = (hasOpSize ? 2 : 4);
}
....
This is confused to me: so we have registerSize to be either 2 or 4 bytes.
But we might have instruction like:
adc al, 0x89
This case we should have registerSize = 1 for AL. So is this a bug, or I am...
2014 Apr 02
2
[LLVMdev] registerSize on X86 confused?
...blerDecoder.c, we have function readPrefixes() with
>> below code:
>>
>> .....
>> } else if (insn->mode == MODE_32BIT) {
>> insn->registerSize = (hasOpSize ? 2 : 4);
>> insn->addressSize = (hasAdSize ? 2 : 4);
>> insn->displacementSize = (hasAdSize ? 2 : 4);
>> insn->immediateSize = (hasOpSize ? 2 : 4);
>> }
>> ....
>>
>> This is confused to me: so we have registerSize to be either 2 or 4 bytes.
>> But we might have instruction like:
>>
>> adc al, 0x89
>&g...
2013 Sep 15
0
[LLVMdev] LLVM disassembler bugs
...ards
>
> James
>
>
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2013 Sep 13
3
[LLVMdev] LLVM disassembler bugs
Hi,
I am looking at the "LLVMOpInfoCallback GetOpInfo" callback.
Example 1 GOOD:
41 c6 84 24 16 04 00 00 0c : movb $12, 1046(%r12)
Makes calls to the callback with:
Offset = 0x4, Size = 0x4 <- Octets: 16 04 00 00
Offset = 0x8, Size = 0x1 <- Octets: 0c
That was correct.
Example 2 BAD:
c7 45 98 a1 ff ff ff : movl $4294967201, -104(%rbp)
Makes calls to the callback