Displaying 20 results from an estimated 51 matches for "disjunction".
2012 Dec 27
1
Conjunction and disjunction in pubmed query
...history=y", sep="")
docId <- xmlTreeParse(getURL(paste(url, search, sep="")),
useInternalNodes=TRUE)
I want to fetch abstracts containing queryTerm1 AND queryTerm2
Or queryTerm3 OR queryTerm4. The code runs without error, but from the
result I find that conjunction and disjunction is not working. Can anyone
suggest a correct syntax for doing AND and OR pubmed query?
Thanks
John
[[alternative HTML version deleted]]
2005 Jan 22
0
statistical test improvement of readability (was average disjunction)
Dear all ReadeRs
I was finding a quick method to improve test readability adding or constructing
(with your help....) one or more function that allow what follow.
Please consider
Trt<-c(1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5)
Block<-c(1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4)
AD2DAT<-c(1.44,2.32,1.68,1.28,0.12,0.08,0.24,0.52,0.12,0.08,0.16,0.28,0.16,0.08,0.12,0.12,0.16,0.08,0.32,0.76)
2017 Feb 06
2
Adding Extended-SSA to LLVM
...> if (x > 2 && x < 5) {
> ...
> } else {
> // known: x <= 2 || x >= 5
> // CVP produces a range for x: [5, 3) (no loss of information here at
> all)
> if (x == 4) ... // CVP folds this to false
> }
>
>
>
Okay, so it does try to handle simple disjunctions.
> So CVP can handle (simple) disjunctive information. Other ValueTracking
> analyses handle simple patterns as well, though probably at this time those
> can't use this new stuff unless we go all in with e-SSA.
> Not sure how to export the information to clients, though. Suppo...
2017 May 14
2
RFC: Representing unions in TBAA
...then search all of them.
>
Which means you have to know they exist, for starters, which means keeping
it in some sorted order and checking, or some other mechanism.
This should not be difficult to implement or use, and seems no less
> efficient than any other way of encoding the concept of disjunction in the
> hierarchy.
>
> It is, in actuality, less efficient.
For starters, in the inverted representation, you don't have to explicitly
represent the things that are children of alias set zero (char in C++'s
case), which is quite common.
It's also trivial to generate transitiv...
2010 Aug 02
3
Using apply for logical conditions
Hi,
I've got some boolean data in a data.frame in the form:
X Y Z A B C
[1] T T F T F F
[2] F T T F F F
.
.
.
What I want to do is create a new column which is the logical disjunction of
several of the columns.
Just like:
new.column <- data$X | data$Y | data$Z
However I don't want to hard code the particular columns into the expression
like that. I've tried using apply row wise with `|` as the function:
columns <- c(X,Y,Z)
apply(data[,columns], 1,`|`)
This does...
2013 Oct 08
1
nut-2.6.5:rhino.c:190: bad if test ?
Hello there,
Offending source code is
????? if(? ( BattVoltage> 129 ) || ( BattVoltage < 144 ) )
Maybe swap || for && would be better.
This problem I found by using cppcheck. It said
[rhino.c:190]: (warning) Logical disjunction always evaluates to true: BattVoltage> 129 || BattVoltage < 144.
Regards
David Binderman
2004 Mar 04
1
Re. : Re: Re: Multiple DB / fragmented information
...g.com>:
> Salut Lapin(c),
>
> Comment va depuis notre longue discussion sur Solutions Linux ?
Plutot bien merci :)
>
> Lapin(c) wrote:
>
> > I was exploring a local LDAP solution, as it's for a very large network
> (1000
> > sites / 100000 users) we want a disjunction between local
administration
> for
> > machines and global administration for users.
>
> What do you mean for disjunction between local administration and users ?
>
> Do you mean :
> 1. Separation between directory insertion (etheir user or machine) and
> local PC admin r...
2020 Feb 27
2
[Bug 1409] New: nft manpage makes confusing reference to logical operators
...al and other types of
> expressions to form complex or relational (match) expressions
http://git.netfilter.org/nftables/tree/doc/nft.txt#n680
However it's not clear if logical combinations are actually possible?
https://bugzilla.netfilter.org/show_bug.cgi?id=1202#c1 explicitly states that
disjunctions are definitely not supported, so logical OR, and XOR are right
out, and given that I'd say NAND almost certainly is too. The only combining
operator for matches is AND.
Also, rummaging through the grammar file seems to confirm that there are only
_bitwise_ operators.
--
You are receiving t...
2012 Apr 01
2
Project: QueryParser Reimplementation, to Olly Betts and Dan Colish
...s to further limit the set of vocabulary terms, then
compute the edit distance of strings.
2) deal with synonyms. This can be done by index unnormalized tokens and
maintain a query expansion list of multiple vocabulary entries to consider
for a certain query term. A query term is then effectively a disjunction of
several postings list. Also, an alternative is to do the expansion during
index construction.
3) deal with stop words. In modern search engines this is not a good idea,
so I think we can just discard it.
4) dividing the queries. User input might be long sentence and contains
?stop words?. Search...
2017 Oct 10
2
Expose aliasing information in getModRefInfo (or viceversa?)
>
> Sigh
> I should have taken the time to give a better example.
> The must-alias part is irrelevant to an example (it only requires
> read-onlyness)
>
> You said "LICM doesn't move calls, so we'd never really care about
> must-alias for promotion". I was just pointing out other things move calls
> any may want to know.
>
> If you want an example
2005 Jul 11
2
[LLVMdev] Does the gcc frontend do inlining or deadcode elimination ?
This didn't work as I tried with 197.parser. it works without
"-Wl,-disable-opt" switch though.
[197.parser]$ llvm-gcc analyze-linkage.c and.c build-disjuncts.c
extract-links.c fast-match.c idiom.c main.c massage.c parse.c
post-process.c print.c prune.c read-dict.c utilities.c xalloc.c
word-file.c strncasecmp.c -Wa,-disable-opt -Wl,-disable-opt -lm -o
llvm_parser
[197.parser]$
2017 Oct 10
2
Expose aliasing information in getModRefInfo (or viceversa?)
I'm trying to understand what is the result we'd seek in the example
in D38569 (pasting here for quick access)
double f(double a)
{
double b;
double c,d;
double (*fp) (double) __attribute__ ((const));
/* Partially redundant call */
if (a < 2.0)
{
fp = sin;
c = fp (a);
}
else
{
c = 1.0;
fp = cos;
}
d = fp (a);
2005 Jul 12
0
[LLVMdev] Does the gcc frontend do inlining or deadcode elimination ?
On Mon, 11 Jul 2005, Long Fei wrote:
>
> This didn't work as I tried with 197.parser. it works without
> "-Wl,-disable-opt" switch though.
>
> [197.parser]$ llvm-gcc analyze-linkage.c and.c build-disjuncts.c
> extract-links.c fast-match.c idiom.c main.c massage.c parse.c post-process.c
> print.c prune.c read-dict.c utilities.c xalloc.c word-file.c
2017 May 14
2
RFC: Representing unions in TBAA
...and
> playing with a representation we aren't actually sure we can make efficient
> for this case?
>
>
> I don't see why need to break backward compatibility. Do you have
> something specific in mind? Once we extend the TBAA implementation to treat
> repeated offsets as disjunction, then we'll extend Clang to emit metadata
> for unions in this form. Old IR will work exactly as it does now.
>
Except the Old IR is irretrievably broken. and in this method, you can't
tell whether you are dealing with correct TBAA or not.
Earlier, the discussion was basically "...
2016 Apr 22
2
if-conversion
...one will be released along with submission of my PhD thesis at the end
> of the year.
>
> That said, if you are only looking for if-conversion of code with
> limited complexity (e.g. no side effects, no loops), it is really simple:
> - Compute masks for every block (entry mask: disjunction of incoming
> masks, exit masks: conjunctions of entry mask and (negated) condition).
> - Replace each phi by a select that uses the entry mask of the
> corresponding block.
> - Order blocks topologically by data dependencies, remove outgoing
> edges, create unconditional branch...
2013 Oct 28
2
[LLVMdev] Loop vectorizer dosen't find loop bounds
Bingo! That works (when coming from C source)
Now, I have a serious problem. I am not coming from C but I build the
function with the builder. I am also forced to change the signature and
load the pointers a,b,c afterwards:
define void @bar([8 x i8]* nocapture readonly %arg_ptr) #0 {
entrypoint:
%0 = bitcast [8 x i8]* %arg_ptr to i32*
%1 = load i32* %0, align 4
%2 = getelementptr [8 x
2013 Oct 28
0
[LLVMdev] Loop vectorizer dosen't find loop bounds
----- Original Message -----
> Bingo! That works (when coming from C source)
>
> Now, I have a serious problem. I am not coming from C but I build the
> function with the builder. I am also forced to change the signature
> and
> load the pointers a,b,c afterwards:
>
> define void @bar([8 x i8]* nocapture readonly %arg_ptr) #0 {
> entrypoint:
> %0 = bitcast [8 x
2013 Oct 29
2
[LLVMdev] Loop vectorizer dosen't find loop bounds
Thanks for the alternatives!
I am trying the 'extracting sub-function' approach. However, it seems I
can't get the 'subfunction' to pass the verifier. This is my subfunction:
define void @main_extern([8 x i8]* %arg_ptr) {
entrypoint:
%0 = getelementptr [8 x i8]* %arg_ptr, i32 0
%1 = bitcast [8 x i8]* %0 to i64*
%2 = load i64* %1
%3 = getelementptr [8 x i8]*
2016 Apr 23
2
if-conversion
...t the
>>> end
>>> of the year.
>>>
>>> That said, if you are only looking for if-conversion of code with
>>> limited complexity (e.g. no side effects, no loops), it is really
>>> simple:
>>> - Compute masks for every block (entry mask: disjunction of
>>> incoming
>>> masks, exit masks: conjunctions of entry mask and (negated)
>>> condition).
>>> - Replace each phi by a select that uses the entry mask of the
>>> corresponding block.
>>> - Order blocks topologically by data dependencies, re...
2011 Oct 21
0
[LLVMdev] Problems with live intervals and spilling when having sub registers?
Hi,
I'm having some trouble understanding if the live intervals calculated
for one of my testcases are correct or not.
I have the following instructions:
272L %vreg67:lo<def> = mv_any16 65535; R:%vreg67
288L %vreg64:hi<def> = mv_any16 16383; R:%vreg64
304L %vreg64:lo<def> = COPY %vreg67:lo; R:%vreg64,%vreg67
320L %vreg6<def> = COPY %vreg64<kill>;