search for: dgoyal

...of "conceptual unit" differently, but try to do it so that each one becomes 100-300 lines of code :) These aren't hard limits by the way, but good rules of thumb to go by when sending patches for upstream inclusion. Cheers, -ilia On Thu, Mar 12, 2015 at 1:20 AM, Deepak Goyal <dgoyal at nvidia.com> wrote: > Hi Mirkin, > > Your observations are quiet correct. > After the boot code is submitted successfully, I will submit the code to configure & enable features of PMU.(This will be done by sending cmds to PMU). > > Now talking about this patch: > Apart...

From: Deepak Goyal <dgoyal at nvidia.com> - Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It...

...f these API calls should probably be a separate patch (after an initial "just load it and do nothing" style patch). Or perhaps have the infrastructure that you add first and then something that implements the API calls. Cheers, -ilia On Wed, Mar 11, 2015 at 2:33 AM, Deepak Goyal <dgoyal at nvidia.com> wrote: > It adds PMU boot support.It loads PMU > firmware into PMU falcon.RM/Kernel driver > receives INIT ack (through interrupt mechanism) > from PMU when PMU boots with success. > > Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> > --- > drm/no...

...better spent making > progress on (and starting submission of) the secure boot code. Hopefully > this patch starts to be in good shape, so I will take care of it from now > on. Thanks! > > > On 04/13/2015 07:38 PM, Alexandre Courbot wrote: >> >> From: Deepak Goyal <dgoyal at nvidia.com> >> >> - Maps PMU firmware into PMU virtual memory. >> - Copy bootloader into PMU memory and start it. >> - Allow the PMU to interact with HOST via interrupts. >> >> PMU after successful configurations (to follow after this patch) will: >>...

...ly power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies by reporting Perf counters. 3.Be critical for GPU functionality as future GPUs secure some register & mem accesses involved in context switch. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/gk20a.c | 855 +++++++++++++++++++++++++++++++++++- 1 file changed, 840 insertions(+), 15 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/gk20a.c b/drm/nouveau/nvkm/subdev/pmu/gk20a.c index 594f746e68f2..328c0a68d615 100644 --- a/drm/nouveau...

...f these API calls should probably be a separate patch (after an initial "just load it and do nothing" style patch). Or perhaps have the infrastructure that you add first and then something that implements the API calls. Cheers, -ilia On Wed, Mar 11, 2015 at 2:33 AM, Deepak Goyal <dgoyal at nvidia.com> wrote: > It adds PMU boot support.It loads PMU > firmware into PMU falcon.RM/Kernel driver > receives INIT ack (through interrupt mechanism) > from PMU when PMU boots with success. > > Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> > --- > drm/no...

It adds PMU boot support.It loads PMU firmware into PMU falcon.RM/Kernel driver receives INIT ack (through interrupt mechanism) from PMU when PMU boots with success. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 26 +- drm/nouveau/nvkm/subdev/pmu/base.c | 108 ++ drm/nouveau/nvkm/subdev/pmu/gk20a.c | 2131 ++++++++++++++++++++++++++++++++- drm/nouveau/nvkm/subdev/pmu/gk20a.h | 369 ++++++ drm/nouveau/nvkm/subdev/pmu/priv.h | 264...

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,