Displaying 10 results from an estimated 10 matches for "df8b919dcf09".
2018 Jun 10
2
[PATCH] drm: nouveau: Enable gp20b/gp10b firmware tag when relevant
...;
---
drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 ++
drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index 30491d132d59..df8b919dcf09 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -129,6 +129,7 @@ gm20b_secboot_new(struct nvkm_device *device, int index,
return 0;
}
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
MODULE_FIRMWARE("nvidia/gm20b/acr...
2020 Jan 08
1
[PATCH] nouveau/secboot/gm20b: initialize pointer in gm20b_secboot_new()
...;
---
Static analysis. I'm not sure how this is called.
drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index df8b919dcf09..ace6fefba428 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -108,6 +108,7 @@ gm20b_secboot_new(struct nvkm_device *device, int index,
struct gm200_secboot *gsb;
struct nvkm_acr *acr;
+ *psb = NULL;
acr = acr_r35...
2018 Jun 11
1
[PATCH] drm: nouveau: Enable gp20b/gp10b firmware tag when relevant
...ecboot/gm20b.c | 2 ++
>> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
>> index 30491d132d59..df8b919dcf09 100644
>> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
>> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
>> @@ -129,6 +129,7 @@ gm20b_secboot_new(struct nvkm_device *device, int index,
>> return 0;
>> }
>>
>> +#if IS_ENABLED(C...
2018 Jun 11
0
[PATCH] drm: nouveau: Enable gp20b/gp10b firmware tag when relevant
...uveau/nvkm/subdev/secboot/gm20b.c | 2 ++
> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> index 30491d132d59..df8b919dcf09 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> @@ -129,6 +129,7 @@ gm20b_secboot_new(struct nvkm_device *device, int index,
> return 0;
> }
>
> +#if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
>...
2019 Sep 17
2
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...Tegra-only */
> -int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *, u32);
> +int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *);
>
> #endif
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> index df8b919dcf09..f8a543122219 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> @@ -23,39 +23,65 @@
> #include "acr.h"
> #include "gm200.h"
>
> -#define TEGRA210_MC_BASE 0...
2019 Sep 16
0
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...truct nvkm_falcon *);
/* Tegra-only */
-int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *, u32);
+int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index df8b919dcf09..f8a543122219 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -23,39 +23,65 @@
#include "acr.h"
#include "gm200.h"
-#define TEGRA210_MC_BASE 0x70019000
-
#ifdef CONFIG_ARCH_TEGRA
-#define MC_SEC...
2019 Sep 17
0
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...m20b_secboot_tegra_read_wpr(struct gm200_secboot *, u32);
> > +int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> > index df8b919dcf09..f8a543122219 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> > @@ -23,39 +23,65 @@
> > #include "acr.h"
> > #include "gm200.h"
> >
> > -#define TEGRA...
2019 Sep 16
15
[PATCH 00/11] drm/nouveau: Enable GP10B by default
From: Thierry Reding <treding at nvidia.com>
Hi,
the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why
exactly is not clear, but there are slight differences between the SKUs
that were tested. It turns out that the biggest issue is that on some
devices (e.g. the one that I have), pulsing the GPU reset twice as is
done in the current code (once as part of the power-ungate
2019 Nov 02
13
[PATCH v2 0/9] drm/nouveau: Various fixes for GP10B
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
here's a revised subset of the patches I had sent out a couple of weeks
ago. I've reworked the BAR2 accesses in the way that you had suggested,
which at least for GP10B turned out to be fairly trivial to do. I have
not looked in detail at this for GV11B yet, but a cursory look showed
that BAR2 is accessed in more places, so the
2019 Dec 09
11
[PATCH v3 0/9] drm/nouveau: Various fixes for GP10B
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
here's a revised subset of the patches I had sent out a couple of weeks
ago. I've reworked the BAR2 accesses in the way that you had suggested,
which at least for GP10B turned out to be fairly trivial to do. I have
not looked in detail at this for GV11B yet, but a cursory look showed
that BAR2 is accessed in more places, so the