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...um_vq; i++) > + mutex_unlock(&mvdev->vr_mutex[i]); > + mutex_unlock(&mvdev->mdev->mic_mutex); > + return ret; > +} > + > +static int mic_copy_dp_entry(struct mic_vdev *mvdev, > + void __user *argp, > + __u8 *type, > + struct mic_device_desc **devpage) > +{ > + struct mic_device *mdev = mvdev->mdev; > + struct mic_device_desc dd, *dd_config, *devp; > + struct mic_vqconfig *vqconfig; > + int ret = 0, i; > + bool slot_found = false; > + > + if (copy_from_user(&dd, argp, sizeof(dd))) { > + dev_err(mic_dev(mvdev),...

...exit: + for (i = 0; i < mvdev->dd->num_vq; i++) + mutex_unlock(&mvdev->vr_mutex[i]); + mutex_unlock(&mvdev->mdev->mic_mutex); + return ret; +} + +static int mic_copy_dp_entry(struct mic_vdev *mvdev, + void __user *argp, + __u8 *type, + struct mic_device_desc **devpage) +{ + struct mic_device *mdev = mvdev->mdev; + struct mic_device_desc dd, *dd_config, *devp; + struct mic_vqconfig *vqconfig; + int ret = 0, i; + bool slot_found = false; + + if (copy_from_user(&dd, argp, sizeof(dd))) { + dev_err(mic_dev(mvdev), "%s %d err %d\n", + __func__, __L...

...exit: + for (i = 0; i < mvdev->dd->num_vq; i++) + mutex_unlock(&mvdev->vr_mutex[i]); + mutex_unlock(&mvdev->mdev->mic_mutex); + return ret; +} + +static int mic_copy_dp_entry(struct mic_vdev *mvdev, + void __user *argp, + __u8 *type, + struct mic_device_desc **devpage) +{ + struct mic_device *mdev = mvdev->mdev; + struct mic_device_desc dd, *dd_config, *devp; + struct mic_vqconfig *vqconfig; + int ret = 0, i; + bool slot_found = false; + + if (copy_from_user(&dd, argp, sizeof(dd))) { + dev_err(mic_dev(mvdev), "%s %d err %d\n", + __func__, __L...

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description: