search for: device_little_endian

When running on PowerPC, we don''t have native PIO support. There are a few hacks around to enable PIO access on PowerPC nevertheless. The most typical one is the isa-mmio device. It takes MMIO requests and converts them to PIO requests on the (QEMU internal) PIO bus. This however is not how real hardware works and it limits us in the ability to spawn eventfd''s on PIO ports

...io_config_writel(proxy->vdev, addr, val); + break; + } +} + static const MemoryRegionOps virtio_pci_config_ops = { .read = virtio_pci_config_read, .write = virtio_pci_config_write, @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read = virtio_pci_config_common_read, + .write = virtio_pci_config_common_write, + .impl = { + .min_access_size = 1, + .max_access_size = 4, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static...

...io_config_writel(proxy->vdev, addr, val); + break; + } +} + static const MemoryRegionOps virtio_pci_config_ops = { .read = virtio_pci_config_read, .write = virtio_pci_config_write, @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read = virtio_pci_config_common_read, + .write = virtio_pci_config_common_write, + .impl = { + .min_access_size = 1, + .max_access_size = 4, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static...

...> + break; > + } > +} > + > static const MemoryRegionOps virtio_pci_config_ops = { > .read = virtio_pci_config_read, > .write = virtio_pci_config_write, > @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static const MemoryRegionOps virtio_pci_config_common_ops = { > + .read = virtio_pci_config_common_read, > + .write = virtio_pci_config_common_write, > + .impl = { > + .min_access_size = 1, > + .max_access_size = 4, > + }, > +...

...gt; diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c > index 62085f9fc063..e93e838243b8 100644 > --- a/hw/display/bochs-display.c > +++ b/hw/display/bochs-display.c > @@ -151,6 +151,26 @@ static const MemoryRegionOps bochs_display_qext_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static uint64_t dummy_read(void *ptr, hwaddr addr, unsigned size) > +{ > + return -1; > +} > + > +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val, unsigned size) > +{ > +} > + > +static const MemoryRegionO...

...gt; diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c > index 62085f9fc063..e93e838243b8 100644 > --- a/hw/display/bochs-display.c > +++ b/hw/display/bochs-display.c > @@ -151,6 +151,26 @@ static const MemoryRegionOps bochs_display_qext_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static uint64_t dummy_read(void *ptr, hwaddr addr, unsigned size) > +{ > + return -1; > +} > + > +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val, unsigned size) > +{ > +} > + > +static const MemoryRegionO...

...mio_readb, + virtio_pci_config_mmio_readw, + virtio_pci_config_mmio_readl, + }, + .write = { + virtio_pci_config_mmio_writeb, + virtio_pci_config_mmio_writew, + virtio_pci_config_mmio_writel, + }, + }, .endianness = DEVICE_LITTLE_ENDIAN, }; @@ -655,6 +705,7 @@ void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev) { uint8_t *config; uint32_t size; + uint8_t bar0_type; proxy->vdev = vdev; @@ -682,10 +733,18 @@ void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev) if (size & (...

...mio_readb, + virtio_pci_config_mmio_readw, + virtio_pci_config_mmio_readl, + }, + .write = { + virtio_pci_config_mmio_writeb, + virtio_pci_config_mmio_writew, + virtio_pci_config_mmio_writel, + }, + }, .endianness = DEVICE_LITTLE_ENDIAN, }; @@ -655,6 +705,7 @@ void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev) { uint8_t *config; uint32_t size; + uint8_t bar0_type; proxy->vdev = vdev; @@ -682,10 +733,18 @@ void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev) if (size & (...

...> + VFIOVMDQuirk *data = opaque; > + uint64_t val = 0; > + > + memcpy(&val, (void *)data->membar_phys + addr, size); > + return val; > +} > + > +static const MemoryRegionOps vfio_vmd_quirk = { > + .read = vfio_vmd_quirk_read, > + .endianness = DEVICE_LITTLE_ENDIAN, > +}; > + > +#define VMD_VMLOCK 0x70 > +#define VMD_SHADOW 0x2000 > +#define VMD_MEMBAR2 4 > + > +static int vfio_vmd_emulate_shadow_registers(VFIOPCIDevice *vdev) > +{ > + VFIOQuirk *quirk; > + VFIOVMDQuirk *data; > + PCIDevice *pdev = &vdev->pde...

...t; + > > > + memcpy(&val, (void *)data->membar_phys + addr, size); > > > + return val; > > > +} > > > + > > > +static const MemoryRegionOps vfio_vmd_quirk = { > > > + .read = vfio_vmd_quirk_read, > > > + .endianness = DEVICE_LITTLE_ENDIAN, > > > +}; > > > + > > > +#define VMD_VMLOCK 0x70 > > > +#define VMD_SHADOW 0x2000 > > > +#define VMD_MEMBAR2 4 > > > + > > > +static int vfio_vmd_emulate_shadow_registers(VFIOPCIDevice *vdev) > > > +{ > > > + VFI...

Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V

Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V