search for: dev_iommu_fwspec_get

...'t have the hardware for those, so any testing of these drivers is greatly appreciated. Please review. Regards, Joerg Changes to v1: - Rebased to v5.6-rc5 - Fixed compile error with CONFIG_IOMMU_API=n - Added Jean-Philippes fix to the ACPI/IORT patch Joerg Roedel (15): iommu: Define dev_iommu_fwspec_get() for !CONFIG_IOMMU_API ACPI/IORT: Remove direct access of dev->iommu_fwspec drm/msm/mdp5: Remove direct access of dev->iommu_fwspec iommu/tegra-gart: Remove direct access of dev->iommu_fwspec iommu: Rename struct iommu_param to dev_iommu iommu: Move iommu_fwspec to struct dev_io...

...[1]; -}; - -/* ATS is supported */ -#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0) - /** * struct iommu_sva - handle to a device-mm bond */ @@ -980,6 +980,11 @@ const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) return NULL; } +static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) +{ + return NULL; +} + static inline bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat) { -- 2.23.0

...t; > +#endif > > > + > > > + nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); > > > + nvkm_wr32(device, 0x17e000, ltc->ltc_nr); > > > + nvkm_wr32(device, 0x100800, ltc->ltc_nr); > > > + > > > +#ifdef CONFIG_IOMMU_API > > > + spec = dev_iommu_fwspec_get(device->dev); > > > + if (spec) { > > > + u32 sid = spec->ids[0] & 0xffff; > > > + > > > + /* stream ID */ > > > + nvkm_wr32(device, 0x160000, sid << 2); > > > + } > > > +#endif > > > > Could we get rid o...

...iort.c b/drivers/acpi/arm64/iort.c index 0e981d7f3c7d..7d04424189df 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1015,7 +1015,7 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev) return ops; if (dev_is_pci(dev)) { - struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct iommu_fwspec *fwspec; struct pci_bus *bus = to_pci_dev(dev)->bus; struct iort_pci_alias_info info = { .dev = dev }; @@ -1028,7 +1028,8 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev) err = pci_for_each_dma_alias(to_pci_dev(dev), iort_pci_i...

If CONFIG_IOMMU_API is n, build fails: vers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c:37:9: error: implicit declaration of function dev_iommu_fwspec_get; did you mean iommu_fwspec_free? [-Werror=implicit-function-declaration] spec = dev_iommu_fwspec_get(device->dev); ^~~~~~~~~~~~~~~~~~~~ iommu_fwspec_free drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c:37:7: warning: assignment makes pointer from integer without a cast [-Wint...

...gt; + struct iommu_fwspec *spec; > > +#endif > > + > > + nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); > > + nvkm_wr32(device, 0x17e000, ltc->ltc_nr); > > + nvkm_wr32(device, 0x100800, ltc->ltc_nr); > > + > > +#ifdef CONFIG_IOMMU_API > > + spec = dev_iommu_fwspec_get(device->dev); > > + if (spec) { > > + u32 sid = spec->ids[0] & 0xffff; > > + > > + /* stream ID */ > > + nvkm_wr32(device, 0x160000, sid << 2); > > + } > > +#endif > > Could we get rid of the #ifdef blocks here if there was a NULL...

...788,28 @@ static int viommu_attach_dev(struct iommu_domain *domain, struct device *dev) return 0; } +static void viommu_detach_dev(struct viommu_endpoint *vdev) +{ + int i; + struct virtio_iommu_req_detach req; + struct viommu_domain *vdomain = vdev->vdomain; + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(vdev->dev); + + if (!vdomain) + return; + + req = (struct virtio_iommu_req_detach) { + .head.type = VIRTIO_IOMMU_T_DETACH, + .domain = cpu_to_le32(vdomain->id), + }; + + for (i = 0; i < fwspec->num_ids; i++) { + req.endpoint = cpu_to_le32(fwspec->ids[i]); + WARN_ON(viommu_send_...

...788,28 @@ static int viommu_attach_dev(struct iommu_domain *domain, struct device *dev) return 0; } +static void viommu_detach_dev(struct viommu_endpoint *vdev) +{ + int i; + struct virtio_iommu_req_detach req; + struct viommu_domain *vdomain = vdev->vdomain; + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(vdev->dev); + + if (!vdomain) + return; + + req = (struct virtio_iommu_req_detach) { + .head.type = VIRTIO_IOMMU_T_DETACH, + .domain = cpu_to_le32(vdomain->id), + }; + + for (i = 0; i < fwspec->num_ids; i++) { + req.endpoint = cpu_to_le32(fwspec->ids[i]); + WARN_ON(viommu_send_...

...ce *smmu, u32 sid) static struct iommu_ops arm_smmu_ops; -static int arm_smmu_add_device(struct device *dev) +static struct iommu_device *arm_smmu_probe_device(struct device *dev) { int i, ret; struct arm_smmu_device *smmu; struct arm_smmu_master *master; struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); - struct iommu_group *group; if (!fwspec || fwspec->ops != &arm_smmu_ops) - return -ENODEV; + return ERR_PTR(-ENODEV); if (WARN_ON_ONCE(dev_iommu_priv_get(dev))) - return -EBUSY; + return ERR_PTR(-EBUSY); smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); if (!sm...

..._to_virtio(dev)->priv : NULL; } -static int viommu_add_device(struct device *dev) +static struct iommu_device *viommu_probe_device(struct device *dev) { int ret; - struct iommu_group *group; struct viommu_endpoint *vdev; struct viommu_dev *viommu = NULL; struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); if (!fwspec || fwspec->ops != &viommu_ops) - return -ENODEV; + return ERR_PTR(-ENODEV); viommu = viommu_get_by_fwnode(fwspec->iommu_fwnode); if (!viommu) - return -ENODEV; + return ERR_PTR(-ENODEV); vdev = kzalloc(sizeof(*vdev), GFP_KERNEL); if (!vdev) - return...

...b/drivers/iommu/mtk_iommu.c @@ -441,38 +441,26 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, return pa; } -static int mtk_iommu_add_device(struct device *dev) +static struct iommu_device *mtk_iommu_probe_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct mtk_iommu_data *data; - struct iommu_group *group; if (!fwspec || fwspec->ops != &mtk_iommu_ops) - return -ENODEV; /* Not a iommu client device */ + return ERR_PTR(-ENODEV); /* Not a iommu client device */ data = dev_iommu_priv_get(dev); - iommu_device_link(&data...

...ommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -416,14 +416,12 @@ static int mtk_iommu_create_mapping(struct device *dev, return 0; } -static int mtk_iommu_add_device(struct device *dev) +static struct iommu_device *mtk_iommu_probe_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); - struct dma_iommu_mapping *mtk_mapping; struct of_phandle_args iommu_spec; struct of_phandle_iterator it; struct mtk_iommu_data *data; - struct iommu_group *group; int err; of_for_each_phandle(&it, err, dev->of_node, "iommus", @@ -442,35 +440,28 @@ static int mtk...

On 2020-04-08 3:37 pm, Joerg Roedel wrote: > Hi Robin, > > thanks for looking into this. > > On Wed, Apr 08, 2020 at 01:09:40PM +0100, Robin Murphy wrote: >> For a hot-pluggable bus where logical devices may share Stream IDs (like >> fsl-mc), this could happen: >> >> create device A >> iommu_probe_device(A) >> iommu_device_group(A)

...iommu_domain *domain, struct device *dev) > return 0; > } > > +static void viommu_detach_dev(struct viommu_endpoint *vdev) > +{ > + int i; > + struct virtio_iommu_req_detach req; > + struct viommu_domain *vdomain = vdev->vdomain; > + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(vdev->dev); > + > + if (!vdomain) > + return; > + > + req = (struct virtio_iommu_req_detach) { > + .head.type = VIRTIO_IOMMU_T_DETACH, > + .domain = cpu_to_le32(vdomain->id), > + }; > + > + for (i = 0; i < fwspec->num_ids; i++) { > + req.endpoint =...

...Ben Dooks). Joerg has given an Acked-by on the first two patches, so I think it'd be easiest if you picked those up into the Nouveau tree because of the build dependency of subsequent patches on them. Thierry Thierry Reding (9): iommu: Document iommu_fwspec::flags field iommu: Add dummy dev_iommu_fwspec_get() helper drm/nouveau: fault: Add support for GP10B drm/nouveau: tegra: Do not try to disable PCI device drm/nouveau: tegra: Avoid pulsing reset twice drm/nouveau: tegra: Set clock rate if not set drm/nouveau: secboot: Read WPR configuration from GPU registers drm/nouveau: gp10b: Add cus...

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate

...nto a stable branch and send a pull request to both of you. Or yet another alternative would be for Joerg to apply them now and Ben to wait for v5.5-rc1 until he picks up the rest. All of those work for me. Thierry Thierry Reding (9): iommu: Document iommu_fwspec::flags field iommu: Add dummy dev_iommu_fwspec_get() helper drm/nouveau: fault: Add support for GP10B drm/nouveau: tegra: Do not try to disable PCI device drm/nouveau: tegra: Avoid pulsing reset twice drm/nouveau: tegra: Set clock rate if not set drm/nouveau: secboot: Read WPR configuration from GPU registers drm/nouveau: gp10b: Add cus...

On Tue, Jan 15, 2019 at 12:19:52PM +0000, Jean-Philippe Brucker wrote: > Implement the virtio-iommu driver, following specification v0.9 [1]. > > This is a simple rebase onto Linux v5.0-rc2. We now use the > dev_iommu_fwspec_get() helper introduced in v5.0 instead of accessing > dev->iommu_fwspec, but there aren't any functional change from v6 [2]. > > Our current goal for virtio-iommu is to get a paravirtual IOMMU working > on Arm, and enable device assignment to guest userspace. In this > use-case...

Hi, here is the second version of this patch-set. The first version with some more introductory text can be found here: https://lore.kernel.org/lkml/20200407183742.4344-1-joro at 8bytes.org/ Changes v1->v2: * Rebased to v5.7-rc1 * Re-wrote the arm-smmu changes as suggested by Robin Murphy * Re-worked the Exynos patches to hopefully not break the driver anymore * Fixed a missing

Hi, here is the second version of this patch-set. The first version with some more introductory text can be found here: https://lore.kernel.org/lkml/20200407183742.4344-1-joro at 8bytes.org/ Changes v1->v2: * Rebased to v5.7-rc1 * Re-wrote the arm-smmu changes as suggested by Robin Murphy * Re-worked the Exynos patches to hopefully not break the driver anymore * Fixed a missing