search for: denbench

Displaying 6 results from an estimated 6 matches for "denbench".

2016 Aug 09
2
enabling interleaved access loop vectorization
Thanks Ayal! I'll take a look at DENBench. As another data point - I tried enabling this on our internal benchmarks. I'm seeing one regression, and it seems to be a regression of the "good" kind - without interleaving we don't vectorize the innermost loop, and with interleaving we do. The vectorized loop is actually sign...
2016 Aug 16
2
enabling interleaved access loop vectorization
...a reproducer), turn it off again and go back to analysis. But I'd strongly prefer to "prefetch" the problem. Thanks, Michael On Wed, Aug 10, 2016 at 4:32 PM, Michael Kuperstein <mkuper at google.com> wrote: > So, unfortunately, it turns out I don't have access to DENBench. > > Do you happen to have a reduced example that gets pessimized by this? > > On Tue, Aug 9, 2016 at 11:25 AM, Michael Kuperstein <mkuper at google.com> > wrote: > >> Thanks Ayal! >> >> I'll take a look at DENBench. >> >> As another data po...
2016 Aug 17
2
enabling interleaved access loop vectorization
..."prefetch" > the problem. > > > > Thanks, > > Michael > > > > > > > > > > On Wed, Aug 10, 2016 at 4:32 PM, Michael Kuperstein <mkuper at google.com> > wrote: > > So, unfortunately, it turns out I don't have access to DENBench. > > > > Do you happen to have a reduced example that gets pessimized by this? > > > > On Tue, Aug 9, 2016 at 11:25 AM, Michael Kuperstein <mkuper at google.com> > wrote: > > Thanks Ayal! > > > > I'll take a look at DENBench. > > > &gt...
2016 Sep 01
2
enabling interleaved access loop vectorization
...dding "*out++ = 0" right after "*out++ = q;" (thus eliminating the pesky <12 x i8>), we get: Indeed such padding is a known (programmer) optimization to effectively have power-of-2 strides and/or alignment. > So, unfortunately, it turns out I don't have access to DENBench. If you like we could test your patch to see how it (mis)behaves. From: Michael Kuperstein [mailto:mkuper at google.com] Sent: Thursday, August 18, 2016 03:57 To: Zaks, Ayal <ayal.zaks at intel.com> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com>; Renato Golin <renato.gol...
2016 Aug 07
2
enabling interleaved access loop vectorization
We checked the gathered data again. All regressions that we see are in 32-bit mode. The 64-bit mode looks good overall. - Elena From: Michael Kuperstein [mailto:mkuper at google.com] Sent: Saturday, August 06, 2016 02:56 To: Renato Golin <renato.golin at linaro.org> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com>; Matthew Simpson <mssimpso at codeaurora.org>;
2017 May 30
8
Enable vectorizer-maximize-bandwidth by default?
On Fri, May 19, 2017 at 4:01 PM Adam Nemet via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I will run it on Cyclone/AArch64 next week. > FYI, we're still waiting on these Adam... -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170530/7cb390ca/attachment.html>