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...cortex-A9 support it but isn't documented/recommended ? And as mentioned before code is working ! Seb > -----Original Message----- > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > Renato Golin > Sent: Friday, November 09, 2012 6:27 PM > To: Sebastien DELDON-GNB > Cc: JF Bastien; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > Hi Sebastien, > > ARMv7-M has VFMA and LLVM's "triple" is far from perfect. > > Wikipedia tells me NovaThor can also be A15, or STE could have cramped a &...

cat /proc/cpuinfo ? Are you sure it's generating VFMA and not VMLA? On Fri, Nov 9, 2012 at 9:35 AM, Sebastien DELDON-GNB < sebastien.deldon at st.com> wrote: > Hi Renato, > > It's definitively not A15. Can this be the case that NEON units for > cortex-A9 support it but isn't documented/recommended ? > And as mentioned before code is working ! > > Seb > > > > -----Or...

...ng fma for my platform STEricsson Novathor with Linaro, code works. It also works when I use LLVM to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] fmac generation for cortex-a9 AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, i...

...c. So back to the original problem why when using -mcpu=cortex-a9 VMLA/VMLS are not generated and when I use -mtriple=armv7-eabi they are ? Best Regards Seb ________________________________________ De : JF Bastien [jfb at google.com] Date d'envoi : vendredi 9 novembre 2012 18:45 À : Sebastien DELDON-GNB Cc : Renato Golin; llvmdev at cs.uiuc.edu Objet : Re: [LLVMdev] fmac generation for cortex-a9 cat /proc/cpuinfo ? Are you sure it's generating VFMA and not VMLA? On Fri, Nov 9, 2012 at 9:35 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com<mailto:sebastien.deldon at st.com>&...

...generation for me. I would like just to understand why -mtriple=armv7-eabi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday, November 08, 2012 10:22 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > On 8 November 2012 13:56, Sebastien DELDON-GNB > <sebastien.deldon at st.com> wrote: > > Hi all, > > > > > > > > > > > > I've a .ll code th...

...from perfect. Wikipedia tells me NovaThor can also be A15, or STE could have cramped a VFPv4 in it? ;) Or possibly, your code never branches into the VFMA. Many things could be happening, but usually, VFMA shouldn't be generated for A9. A GCC bug, maybe? On 9 November 2012 16:51, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi Bastien, > > > > Weird gcc is generating fma for my platform STEricsson Novathor with Linaro, > code works. It also works when I use LLVM to generate fma (using llc > –mtriple=armv7-eabi). Maybe someone from ARM can answer the...

...FPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, it's a multiply followed by an add and has different latency as well as precision. On Thu, Nov 8, 2012 at 4:57 AM, Sebastien DELDON-GNB < sebastien.deldon at st.com> wrote: > Hi Anitha, > > Thanks for your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable > fused mac generation for me. > I would like just to understand why -mtriple=armv7-eabi enables it while > -mcpu=cortex-a9 seems to disable...

...ill raise an exception (SEGFAULT), I just want to know if there is a way to enforce generation of movupd instruction instead of movapd. Seb > -----Original Message----- > From: David A. Greene [mailto:greened at obbligato.org] > Sent: Friday, February 25, 2011 5:13 PM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Use of movupd instead of movapd for x86 > > Sebastien DELDON-GNB <sebastien.deldon at st.com> writes: > > > Hi all, > > > > Is there a way to force llc to generate movupd instruction instead of > m...

On Feb 28, 2011, at 2:58 AM, Sebastien DELDON-GNB wrote: > Understood for the aligned case, I want to measure performance degradation for unaligned case. > I mean unaligned case versus aligned. I know this is stupid, but I want to try to pass a <4 x float>* as parameter of a routine and at the call site I want to pass a misaligned...

On 12 February 2013 16:56, Sebastien DELDON-GNB <sebastien.deldon at st.com>wrote: > If this helps taking your decision, there are at least two benchmarks for > which disabling vmlx-forwarding makes a significant difference. > I think Evan's worry was to base this decision on visible and comprehensible benchmarks, such a...

...VM that could be adapted to 'legalize' intrinsics calls ? Or shall I define my own intrinsics for non supported types ? Best Regards Seb ________________________________________ De : Eli Friedman [eli.friedman at gmail.com] Date d'envoi : vendredi 21 septembre 2012 11:54 À : Sebastien DELDON-GNB Cc : llvmdev at cs.uiuc.edu Objet : Re: [LLVMdev] Question about LLVM NEON intrinsics On Fri, Sep 21, 2012 at 1:28 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > I would like to know if LLVM Neon intrinsics are designed to support only 'Legal'...

...to use my front-end to generate llvm neon intrinsics that maps to LLVM vmla/vmls f32 when I think it is appropriate and not to rely on disabling/enabling vmlx-forwarding. Best Regards Seb From: Renato Golin [mailto:renato.golin at linaro.org] Sent: Friday, February 08, 2013 11:54 AM To: Sebastien DELDON-GNB Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Is there any llvm neon intrinsic that maps to vmla.f32 instruction ? On 8 February 2013 10:40, Sebastien DELDON-GNB <sebastien.deldon at st.com<mailto:sebastien.deldon at st.com>> wrote: Hi all, Everything is in the tile, I would l...

Hi all, I would like to know how can I express debug information for an outlined function using llvm debug metadata. I mean I have a function f() and part of its code is outlined in a new function g() . I would like to generate llvm debug metadata so that when stepping in g() the debugger step in original sources lines from f() routine ? Thanks for your help Seb

...speed-up on ref dataset for MILC. So I'm observing something similar to what I've observed on STE platform available on SNOWBALL board. Hope this helps Best Regards Seb From: Lang Hames [mailto:lhames at gmail.com] Sent: Wednesday, February 13, 2013 8:31 AM To: Renato Golin Cc: Sebastien DELDON-GNB; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] RE : Is there any llvm neon intrinsic that maps to vmla.f32 instruction ? Hi Sebastien, How many extra vmlas did you see in 433.milc due to disabling -vmlx-forwarding? As I mentioned earlier, I saw only two additional integer vmlx instructions wh...

On Sep 21, 2012, at 2:58 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi Eli, > > Thanks for the answer, it clarifies the situation for me. Do you know if there is Pass in LLVM that could be adapted to 'legalize' intrinsics calls ? > Or shall I define my own intrinsics for non supported types ? Y...

...tions when I tested. Could you send me your 433.milc compile setup? (os, flags, compiler version, etc.). I'd like to try to reproduce your results. Cheers, Lang. On Tue, Feb 12, 2013 at 9:05 AM, Renato Golin <renato.golin at linaro.org>wrote: > On 12 February 2013 16:56, Sebastien DELDON-GNB <sebastien.deldon at st.com>wrote: > >> If this helps taking your decision, there are at least two benchmarks for >> which disabling vmlx-forwarding makes a significant difference. >> > > I think Evan's worry was to base this decision on visible and > com...

...t an ordering that isn't the language default, or you're using a language code that the debugger doesn't understand. --paulr From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Eric Christopher Sent: Thursday, October 03, 2013 2:58 PM To: sebastien deldon, (PGI) Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] Setting up array ordering dwarf for arrays Not at the moment, we've been adding things that need additions to the metadata on an "as needed" basis. Do you have a language that allows you to swap orderings in source code?...

On Jul 27, 2012, at 9:04 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > Does llc –march=thumb –mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? That's how I usually do it. Somewhere in the target description we associate a9 with -mattr=+thumb2. There are plenty of other ways to ge...

Hi all, Is there a way to force llc to generate movupd instruction instead of movapd for x86 target ? I know that movapd is more performant, but I would like to measure degradation when alignment constraints are not met. Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL:

...:Module&) + 497 12 llc 0x0000000000f992bb llvm::PassManagerImpl::run(llvm::Module&) + 171 13 llc 0x000000000052feb2 main + 5778 14 libc.so.6 0x00007f5dd62fdc4d __libc_start_main + 253 15 llc 0x000000000052bc29 Stack dump: 0. Program arguments: /home/deldon/Work/dev/pgi/linux86/share/llvm/3.2/bin/llc localvar2.ll -march=x86 -o localvar2.s 1. Running pass 'Function Pass Manager' on module 'localvar2.ll'. 2. Running pass 'X86 AT&T-Style Assembly Printer' on function '@foo' To me debug metadata, I'm generating,...