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...str.h:408 408 MachineInstr.h: No such file or directory. in MachineInstr.h (gdb) up #1 0x40f05f28 in llvm::LiveVariables::HandleVirtRegUse ( this=0x8060270, VRInfo=@0x8061930, MBB=0x8060970, MI=0x80615d0) at ../../lib/CodeGen/LiveVariables.cpp:100 100 assert(MBB != VRInfo.DefInst->getParent() && (gdb) p VRInfo.DefInst $1 = (llvm::MachineInstr *) 0x0 (gdb) up #2 0x40f0678f in llvm::LiveVariables::runOnMachineFunction ( this=0x8060270, MF=@0x8060888) at ../../lib/CodeGen/LiveVariables.cpp:214 214 HandleVirtRegUse(getVarInfo(MO.getReg()), MB...

Hi, I found issues with INDVARS <-> LSR passes interactions after https://reviews.llvm.org/rL346397. There were two main changes in this commit: 1. Previously we were propagating SCEV add expressions even if DefInst of exit value has hard uses inside the loop. After rL346397 we forbid propagation of SCEV add expressions if DefInst of exit value has hard use inside the loop. 2. Previously when checking for hard uses, we were only looking for immediate uses of DefInst. After rL346397 we are going down through th...

...rt that I think cheaks for dead code because a Variable didn't have a defined Instance to a Machine instruction. " llc: LiveVariables.cpp:86: void llvm::LiveVariables::HandleVirtRegUse(llvm::LiveVariables::VarInfo&, llvm::MachineBasicBlock*, llvm::MachineInstr*): Assertion `VRInfo.DefInst && "Register use before def!"' failed. /home/llvm/Debug/bin/llc((anonymous namespace)::PrintStackTrace()+0x1a)[0x86abeda] /home/llvm/Debug/bin/llc((anonymous namespace)::SignalHandler(int)+0xcb)[0x86ac14d] ... " Is there any passes that need to occur to correct this er...

...> code because a Variable didn't have a defined Instance to a Machine > instruction. > > " llc: LiveVariables.cpp:86: void > llvm::LiveVariables::HandleVirtRegUse(llvm::LiveVariables::VarInfo&, > llvm::MachineBasicBlock*, llvm::MachineInstr*): Assertion > `VRInfo.DefInst && "Register use before def!"' failed. This is a bug in your instruction selector and the assertion is telling you exactly what's wrong. Registers in MachineInstrs are also in SSA -- there must be a single static def of any register before its use. To help you narrow do...

...e: > to those coalesced registers, it is logical that noone will ever query > the liveness of those registers (unless there is a bug somewhere in the Indeed the coalesced registers may logically not be queried since they do not appear in any operand list of the machine code, but the VarInfo::DefInst in VirtRegInfo of the _representive register_ is _not_ correct (I could trace the code at the time of writing this mail). In the other words, the patch not only have to remove the VarInfo record in VirtRegInfo, but also have to update the record for _representive register_. -- Tzu-Chien Chiu, 3D...

...nMachineFunction(MachineFunction &fn) { > ... > // perform a final pass over the instructions and compute spill > // weights, coalesce virtual registers and remove identity moves > > but the data structure LiveVariables::VirtRegInfo is _not_ updated. > That is, VarInfo::DefInstr may point to an invalid (being coalesced) > instruction. We could potentially remove those VirtRegInfos for the registers we coalesce. But since after coalescing there are no instructions refering to those coalesced registers, it is logical that noone will ever query the liveness of those regi...

...ons: bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { ... // perform a final pass over the instructions and compute spill // weights, coalesce virtual registers and remove identity moves but the data structure LiveVariables::VirtRegInfo is _not_ updated. That is, VarInfo::DefInstr may point to an invalid (being coalesced) instruction. -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://www.csie.nctu.edu.tw/~jwchiu>

...ble to do it. I guess so, at least. Now when compiling my test program, llc dumps: -- llc: /home/mentat/llvm_work/llvm/lib/CodeGen/LiveVariables.cpp:155: void llvm::LiveVariables::HandleVirtRegUse(llvm::LiveVariables::VarInfo&, llvm::MachineBasicBlock*, llvm::MachineInstr*): Assertion `VRInfo.DefInst && "Register use before def!"' failed. llc((anonymous namespace)::PrintStackTrace()+0x1a)[0x86a167a] [0x6] /lib/libc.so.6(abort+0x108)[0x556d9dc8] /lib/libc.so.6(__assert_fail+0xfc)[0x556d1f6c] llc(llvm::LiveVariables::HandleVirtRegUse(llvm::LiveVariables::VarInfo&, llvm::...

Hi folks, TableGen provides sufficiently rich syntax for expressing target instruction set. Nevertheless, when I wrote the PTX backend, I observed that some redundancy in TableGen can be further eliminated through macro expansion of for-loops. The semantics of a for-loop is expanding the for-loop body, and so it is equivalent to manually unroll the loop (see example #1). I believe the for-loop

For adding the nop: TII->insertNoop(*BB, BB->end()); 2007/8/9, Chris Lattner <sabre at nondot.org>: > > On Thu, 9 Aug 2007, [ISO-8859-1] Emílio Wuerges wrote: > > I too believe it should not be complicated. > > But I was not being able to do it. > > Finally, after some thinking (and tinkering), this worked like a charm: > > > > MachineInstr* mi =