Displaying 3 results from an estimated 3 matches for "def_mo".
2012 Aug 06
0
[LLVMdev] Register Coalescer does not preserve TargetFlag
...ster allocation, lowering NEG/ABS instructions.
> However I met a problem : apparently getNextOperandForReg() can returns a MachineOperand before the one I'm processing.
>
> The following code snippet :
>
>
> void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO, unsigned new_reg, unsigned char flag) {
> MachineOperand * MO = def_MO.getNextOperandForReg();
> while (MO && MO->isUse()) {
> MachineOperand *next_MO = MO->getNextOperandForReg();
> MO->dump();
>
> MO = next_MO;
> }
> }
>
> displa...
2012 Aug 06
3
[LLVMdev] Register Coalescer does not preserve TargetFlag
...instructions.
>> However I met a problem : apparently getNextOperandForReg() can returns a
> MachineOperand before the one I'm processing.
>>
>> The following code snippet :
>>
>>
>> void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO,
> unsigned new_reg, unsigned char flag) {
>> MachineOperand * MO = def_MO.getNextOperandForReg();
>> while (MO && MO->isUse()) {
>> MachineOperand *next_MO = MO->getNextOperandForReg();
>> MO->dump();
>>
>> MO = next_MO...
2012 Aug 06
4
[LLVMdev] Register Coalescer does not preserve TargetFlag
Hi,
R600 hardware (Radeon gfx card) does neither have a NEG nor an ABS instruction ; however any sources operand can be negated/abs'd by setting a bit for every source operand in the final bytecode (but not DST).
A good way of modeling this behavior in LLVM is by using TargetFlag on operand.
Currently the R600 LLVM backend in Mesa lower NEG and ABS DAG instruction to a MOV + TargetFlag using