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> On Aug 27, 2014, at 6:34 AM, Duncan Sands <duncan.sands at deepbluecap.com> wrote: > > I think you should try to get LLVM floating point experts involved, to find out their opinion about whether LLVM should really assume that snans always trap. > > If they think it is fine to assume trapping, then you can fold any floating point operation with an &quo...

On Aug 28, 2014, at 3:03 AM, Duncan Sands <duncan.sands at deepbluecap.com> wrote: > Hi Owen, > > On 27/08/14 19:06, Owen Anderson wrote: >> >>> On Aug 27, 2014, at 6:34 AM, Duncan Sands <duncan.sands at deepbluecap.com >>> <mailto:duncan.sands at deepbluecap.com>> wrote: >>> >>> I think you should...

> On Aug 28, 2014, at 10:58 AM, Duncan Sands <duncan.sands at deepbluecap.com> wrote: > > Hi Stephen, > >>> In the case of fadd, given that "fadd x, -0.0" is always equal to x (same bit pattern), then "fadd x, undef" can be folded to "x" (currently it is folded to undef, which is wrong). This implies that it is correc...

...t, the result does not necessarily compare equal to "x" in floating point comparisons. > Does this mean that folding of the above fadd to "x" in InstructionSimplify is incorrect? > > Oleg > >>> On Aug 28, 2014, at 10:58 AM, Duncan Sands <duncan.sands at deepbluecap.com> wrote: >>> >>> Hi Stephen, >>> >>>>> In the case of fadd, given that "fadd x, -0.0" is always equal to x (same bit pattern), then "fadd x, undef" can be folded to "x" (currently it is folded to undef, which is wrong)....

Hi, I'm stumped by how to handle fpowi. Here is the context: my architecture has i64, f32, and f64 registers. No i32. For calls & returns, we promote i32 to i64. There is no support in the architecture to perform fpowi - it has to go through the runtime. I'm using gfortran + dragonegg + llvm3.4 to generate .ll files via plugin. The fortran expression REAL = REAL ** INTEGER*4

Duncan, > Hi Oleg, > >> >> /This is either a mistake, or a decision that in LLVM IR snans >> are always >> considered to be signalling. / >> Yes, this seems to be an agreement to treat "undef" as a SNaN for >> "fdiv". > > "undef" is whatever bit pattern you want it to be, i.e. the compiler > can assume it is any

Hi Dan, I whipped up this patch as a more optimal test of whether replacing the phi node PN by V will break LCSSA form. I hope it is more or less correct, but since I know nothing about loops it could well be completely bogus :) Can you please comment on it. Best wishes, Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: lcssa.diff Type: text/x-patch

Hi, On 23/07/15 19:11, Philip Reames wrote: > > > On 07/23/2015 07:24 AM, John Regehr wrote: >>> I guess another way to select interesting transformations could be to look >>> for sequences where the >>> result uses a "subset" of the input instruction sequence. >> >> Yeah, I had been noticing those subsets too. It sounds like it's

Hi Oleg, On 01/09/14 15:42, Oleg Ranevskyy wrote: > Hi, > > Thank you for your comment, Owen. > My LLVM expertise is certainly not enough to make such decisions yet. > Duncan, do you have any comments on this or do you know anyone else who can > decide about preserving NaN payloads? my take is that the first thing to do is to see what the IEEE standard says about NaNs.

Hi Oleg, On 01/09/14 18:46, Oleg Ranevskyy wrote: > Hi Duncan, > > I looked through the IEEE standard and here is what I found: > > *6.2 Operations with NaNs* > /"For an operation with quiet NaN inputs, other than maximum and minimum > operations, if a floating-point result is to be delivered the result shall be a > quiet NaN which should be one of the input