Displaying 3 results from an estimated 3 matches for "decuda".
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decida
2007 Nov 11
1
nv50 microcode/shader format
Hello there,
With the use of CUDA and ptx I managed to make a disassembler for at least
one of the nv50 microcode/shader formats. This might come in handy for some
people, hence I'm posting it here:
http://www.cs.rug.nl/~wladimir/decuda/
I'm not yet sure if pixel/vertex shaders use the same instruction format as
the compute shaders used by CUDA, but you'd think so, as nv50 is supposed to
have unified shader units. If anyone can help me a bit in finding the shader
instructions in valgrind-mmt-extend of mmiotrace dumps that...
2009 Sep 10
0
[PATCH 06/13] nv50: handle SEQ, SGT, SLE, SNE opcodes
...- if (dst->type != P_TEMP)
+ if (dst && dst->type != P_TEMP)
dst = alloc_temp(pc, NULL);
/* set.u32 */
set_long(pc, e);
e->inst[0] |= 0xb0000000;
- e->inst[1] |= (3 << 29);
- e->inst[1] |= (c_op << 14);
- /*XXX: breaks things, .u32 by default?
- * decuda will disasm as .u16 and use .lo/.hi regs, but this
- * doesn't seem to match what the hw actually does.
- inst[1] |= 0x04000000; << breaks things.. .u32 by default?
+ e->inst[1] |= 0x60000000 | (ccode << 14);
+
+ /* XXX: decuda will disasm as .u16 and use .lo/.hi regs, but
+...
2009 Jun 21
0
[PATCH] nv50: support for SLE, SNE, SEQ, SGT
..._TEMP)
- dst = alloc_temp(pc, NULL);
+ if (dst && dst->type != P_TEMP)
+ dst = temp_temp(pc);
/* set.u32 */
set_long(pc, e);
e->inst[0] |= 0xb0000000;
- e->inst[1] |= (3 << 29);
- e->inst[1] |= (c_op << 14);
- /*XXX: breaks things, .u32 by default?
- * decuda will disasm as .u16 and use .lo/.hi regs, but this
- * doesn't seem to match what the hw actually does.
- inst[1] |= 0x04000000; << breaks things.. .u32 by default?
- */
- set_dst(pc, dst, e);
+ e->inst[1] |= 0x60000000;
+ /* XXX: decuda will disasm .u16 lo/hi,
+ * but 32 b...