Displaying 8 results from an estimated 8 matches for "declare_pci_fixup_resum".
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declare_pci_fixup_resume
2018 Aug 31
0
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
...em_info(DMI_SYS_VENDOR);
> + u32 value;
> +
> + if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
> + return;
> +
> + pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &value);
> + pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, value);
> +}
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x1901, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x31d8, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x5ad8, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_asus_...
2018 Aug 31
6
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
...e)
+{
+ const char *sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
+ u32 value;
+
+ if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
+ return;
+
+ pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &value);
+ pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, value);
+}
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x1901, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x31d8, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x5ad8, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_asus_pci_prefetch);...
2018 Aug 28
6
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
...write somehow acted as a fence/memory barrier?
static void quirk_pref_base_upper32(struct pci_dev *dev)
{
u32 pref_base_upper32;
pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &pref_base_upper32);
pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, pref_base_upper32);
}
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_pref_base_upper32);
I don't think it's acting as a barrier. I tried changing this code to
rewrite other registers such as PCI_PREF_MEMORY_BASE and that makes
the bug come back.
>> 2. Who is responsible for saving and restoring PCI bridge
>>...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...low
* PCI scanning code to "skip" this now blacklisted device.
*/
-static void __devinit quirk_mellanox_tavor(struct pci_dev *dev)
+static void quirk_mellanox_tavor(struct pci_dev *dev)
{
dev->broken_parity_status = 1; /* This device gives false positives */
}
@@ -83,7 +83,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
This appears to be BIOS not version dependent. So presumably there is a
chipset level fix */
-static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
+static void quirk_isa_dma_hangs(struct pci_dev *dev)
{
if (!isa_...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...low
* PCI scanning code to "skip" this now blacklisted device.
*/
-static void __devinit quirk_mellanox_tavor(struct pci_dev *dev)
+static void quirk_mellanox_tavor(struct pci_dev *dev)
{
dev->broken_parity_status = 1; /* This device gives false positives */
}
@@ -83,7 +83,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
This appears to be BIOS not version dependent. So presumably there is a
chipset level fix */
-static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
+static void quirk_isa_dma_hangs(struct pci_dev *dev)
{
if (!isa_...
2018 Aug 29
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
...barrier?
>
> static void quirk_pref_base_upper32(struct pci_dev *dev)
> {
> u32 pref_base_upper32;
> pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &pref_base_upper32);
> pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, pref_base_upper32);
> }
> DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_pref_base_upper32);
>
this workaround fixes runtime suspend/resume on my laptop as well...
but what baffles me most is, unloading nouveau does as well. I will
see what bits are exactly "fixing" it in the nouveau unloading path
and maybe we can get...
2018 Aug 28
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
...arrier?
>
> static void quirk_pref_base_upper32(struct pci_dev *dev)
> {
> u32 pref_base_upper32;
> pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &pref_base_upper32);
> pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, pref_base_upper32);
> }
> DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_pref_base_upper32);
>
> I don't think it's acting as a barrier. I tried changing this code to
> rewrite other registers such as PCI_PREF_MEMORY_BASE and that makes
> the bug come back.
>
> >> 2. Who is responsible for saving and...
2018 Aug 24
2
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
Hi,
We are facing a suspend/resume problem with many different Asus laptop
models (30+ products) with Intel chipsets (multiple generations) and
nvidia GPUs (several different ones). Reproducers include:
1. Boot
2. Suspend/resume
3. Load nouveau driver
4. Start X
5. Observe slow X startup and many many errors in logs (primarily
nouveau fifo faults)
or
1. Boot
2. Load nouveau driver
3. Start X