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dec27
2011 Feb 26
0
[LLVMdev] TableGen syntax for matching a constant load
...there are no false dependencies. The xor idiom is recognized
>> by processors as old as Pentium 4 as having no dependencies.
>
> Any examples of how to create more than one instructions for a given
> pattern? There are some other cases I could use this for.
def : Pat<(i32 -1), (DEC32r (MOV32r0))>;
/jakob
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2011 Feb 26
2
[LLVMdev] TableGen syntax for matching a constant load
On Sat, Feb 26, 2011 at 01:07:39PM -0800, Jakob Stoklund Olesen wrote:
>
> On Feb 25, 2011, at 7:27 PM, Joerg Sonnenberger wrote:
>
> > I'm trying to add a X86 pattern to turn
> > movl $-1, %eax
> > into
> > orl $-1, $eax
>
> Please make sure to measure the performance impact of doing this. You
> are creating a false dependency on the last
2011 Feb 27
2
[LLVMdev] TableGen syntax for matching a constant load
...es. The xor idiom is recognized
> >> by processors as old as Pentium 4 as having no dependencies.
> >
> > Any examples of how to create more than one instructions for a given
> > pattern? There are some other cases I could use this for.
>
> def : Pat<(i32 -1), (DEC32r (MOV32r0))>;
Hm. Right. This gives the me first set of size peep hole optmisations as
attached. I didn't add the above rule for 64bit builds, since it is
larger than the to-be-figured out OR32rmi8 / OR64rmi8.
Joerg
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