search for: ddi0406c

...all instructions that come after the ISB instruction in program order are fetched from cache or memory only after the ISB instruction has completed." It's behind a registration wall, but the v7 version can be had as a .pdf here: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html Cheers. Tim.

...tp://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html The official instruction encodings are documented in the ARM Architecture Reference Manual. This is publically available from ARM but requires a free registration to download: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0406c/index.html

On 24 June 2014 01:55, Philip Reames <listmail at philipreames.com> wrote: > > On 06/19/2014 09:35 AM, Yi Kong wrote: >> >> Hi all, >> >> I'm currently working on implementing ACLE extensions for ARM. There >> are some memory barrier intrinsics, i.e.__dsb and __isb that require >> the compiler not to reorder instructions around their