search for: dci

Displaying 20 results from an estimated 37 matches for "dci".

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2010 Jun 01
1
loop
Can any one help it will be very kind, loop statements I have this table and some more records, I want to reshape it V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 TP53 Dis1 Dis2 Dis3 Dis4 Dis5 Dis6 DCI New1 New2 New3 New4 FDI Hi2 H3 H4 GHD I1 I3 I4 I5 I6 I7 I8 I want my new table or matrix to be some thing like this V1 V2 V3 Tp53 Dis1 Dis2 Tp53 Dis1 Dis3 Tp53 Dis1 Dis4 Tp53 Dis1 Dis5 Tp53 Dis1 Dis6 Tp53 Dis2 Dis3 Tp53 Dis2 Dis4 Tp53 Dis2 Dis5 Tp53 Dis2 Dis6 Tp53 Dis3 Dis4 Tp53 Dis3 Dis5 Tp53 Di...
2003 Apr 14
0
Help Desk/Call Center Seminars coming to Boston!
...hmarking, Best Practices and Beyond seminar will receive a one time only Complimentary Peer Group Benchmarking Report - a $1500 value - comparing each individual center to their vertical market. Know where you are today, and where you should be! Register by phone, 978-470-3880 or online, http://www.dci.com/regsysv2/page1.asp?REGID=689 Provide priority code BZJTL33 when you register or request more information ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ SEMINAR DETAILS... Download a brochure PDF or view details online by clicking on the links below. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~...
2007 Aug 08
2
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
Hello, Arnold. > with the sentence i tried to express the question whether there is a > way to persuade the code generator to use another register to load (or > move) the function pointer to (right before the callee saved register > restore) but thinking a little further that's nonsense. Why don't define some special op for callee address and custom lower it? I really
2013 Feb 15
10
reading data
Hi, #working directory data1 #changed name data to data1.? Added some files in each of sub directories a1, a2, etc. ?indx1<- indx[indx!=""] lapply(indx1,function(x) list.files(x)) #[[1]] #[1] "a1.txt"??????? "mmmmm11kk.txt" #[[2]] #[1] "a2.txt"??????? "mmmmm11kk.txt" #[[3]] #[1] "a3.txt"??????? "mmmmm11kk.txt" #[[4]] #[1]
2009 Nov 05
2
Seeing "Corrupted transaction log file" error messages.
...no verbose_ssl: yes login_dir: /var/run/dovecot/login login_executable: /usr/local/libexec/dovecot/imap-login login_processes_count: 12 login_max_processes_count: 774 max_mail_processes: 1024 verbose_proctitle: yes first_valid_uid: 200 mail_location: mbox:~/mail:INBOX=/var/spool/mail/%u:INDEX=/var/dcindx/%u mbox_write_locks: fcntl mbox_dirty_syncs: no auth default: passdb: driver: pam userdb: driver: passwd This is happening during peak load; the error msgs I'm seeing look like: Nov 5 15:01:47 mercury mail:err|error dovecot: IMAP(olson): Corrupted transaction log file /var/dci...
2007 Aug 08
0
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
...rtual register holding the function pointer to ecx before the tailcall node. So where i approximately had this before (assuming that RetNode.getOp (1) is not a TargetGlobalAddress or the like) SDOperand OpsTailCall [] = {AdjStackChain, RetNode.getOperand(1), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall,3); would then be replaced by Chain = DAG.getCopyToReg(AdjStackChain, X86::ECX, RetNode.getOperand (1)); SDOperand OpsTailCall [] = {Chain,DAG.getRegister(X86::ECX, getPointerTy())), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAIL...
2013 Jul 09
2
hme0 interface going up/down (dhclient ?)
Hi all, I am having an issue where my hme0 interface is always turning up and down with dhclient requesting a lease. I am thinking this could be the same issue described by Jeremy Chadwick on June 9th: http://lists.freebsd.org/pipermail/freebsd-stable/2013-June/073711.html Everything was fine on 8.2-STABLE and older versions. It was then upgraded directly to 9.0-STABLE
2007 Apr 24
2
problem in tapply command
hello when I entered following command, I got NA values for some catagories. > tapply(slp_jeo2$slp,slp_jeo2$jeo,mean ) 999 Ca Cka DCy Jh JKi Kk 14.06665 NA 14.60445 NA NA NA NA NA KTa KTac Ku Kua Kus Ky Kyk ODe NA NA NA NA NA NA
2007 Aug 08
4
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
Hello, Arnold. > Is there a way to indicate that the register the tail call > instruction uses as destination needs to be valid after the callee > saved registers have been restored? (some X86InstrInfo.td foo magic > maybe ?) It's wrong way to do the things. Because in this case you either violate the ABI for callee, or you're restricted to do tail call lowering only for
2011 Jul 27
0
[LLVMdev] Avoiding load narrowing in DAGCombiner
...on, where a bugfix was made > after 2.8?  Any idea where to look? The following? // If the LHS is '(and load, const)', the RHS is 0, // the test is for equality or unsigned, and all 1 bits of the const are // in the same partial word, see if we can shorten the load. if (DCI.isBeforeLegalize() && N0.getOpcode() == ISD::AND && C1 == 0 && N0.getNode()->hasOneUse() && isa<LoadSDNode>(N0.getOperand(0)) && N0.getOperand(0).getNode()->hasOneUse() && isa<ConstantSDNode>(N...
2011 Jul 27
2
[LLVMdev] Avoiding load narrowing in DAGCombiner
Hi Eli, On 07/27/2011 04:59 PM, Eli Friedman wrote: > On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson > <johnso87 at crhc.illinois.edu> wrote: >> Hi All, >> I'm writing a backend for a target which only supports 4-byte, >> 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and >> STORE nodes in TargetISelLowering.cpp to take advantage of
2012 Feb 07
0
[LLVMdev] DAG optimization and lowering algorithm
On Tue, Feb 7, 2012 at 12:38 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote: > At the beginning, I have the following chain: LOAD -> TRUNCATE -> ZERO_EXTEND. > After Combine(BeforeLegalizeTypes) the optimization of ZERO_EXTEND  gives me the new chain LOAD -> ANY_EXTEND -> AND. > > I want to optimize ANY_EXTEND but is not analyzed in the same Combine().
2016 Aug 29
2
Samba4 Centos 7 - CPU 100%
Let-me explain my environment. I have 3 DCI 105 (Principal) 106 and 101 (where i use for test). All DC its CPU for grow up for 100%. I just make the change in one DC, not all ok ? > How did you provision samba, what were the exact commands used ? samba-tool domain provision --realm=DOMAIN.BR --domain=DOMAIN --server-role=dc --adminpass=p...
2012 Oct 10
2
[LLVMdev] Solicit code review (change to CodeGen)
...o instructions, however, conditional-move from a register needs + // only one instruction. + // + // CAVEAT: By replacing a constant with a symbolic value, it may obscure + // some instruction-combining opportunities. This opt needs to be + // postponed as late as possible. + // + if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { + // the DCI.xxxx conditions are provided to postpone the optimization as + // late as possible. + + ConstantSDNode *CmpAgainst = 0; + if ((Cond.getOpcode() == X86ISD::CMP || Cond.getOpcode() == X86ISD::SUB) && +...
2012 Feb 07
2
[LLVMdev] DAG optimization and lowering algorithm
At the beginning, I have the following chain: LOAD -> TRUNCATE -> ZERO_EXTEND. After Combine(BeforeLegalizeTypes) the optimization of ZERO_EXTEND gives me the new chain LOAD -> ANY_EXTEND -> AND. I want to optimize ANY_EXTEND but is not analyzed in the same Combine(). Combine(AfterLegalizeTypes) is no called at all. - Elena -----Original Message----- From: Eli Friedman
2012 May 29
4
idmap backend = ad and Active Directory 2008R2
Hello All, I'm trying to set up linux ssh/shell authentication on a CentOS_6.2 server running smbd version 3.5.10-114 using winbind/smb/pam. We've done this successfully using the tdb backend but wanted users to get the same UID/GID on every machine. Switched to rid for the backend but users still got a foreign number for UID and their default group was always Domain Users. So I'm
2019 Aug 26
2
LLVM X86 backend combineIncDecVector's transform
...On Mon, Aug 26, 2019 at 8:56 PM Topper, Craig <craig.topper at intel.com> > wrote: > > > > I think DAGToDAG is too late because the build_vector has already been > turned into a constant pool load by then so it’s a little difficult to get > back. Maybe we can delay it to !DCI.isBeforeLegalizeOps()? That would at > least let the first DAG combine and the post type legalization DAG combine > see the add, 1. > > > > > > > > +Sanjay as well > > > > > > > > From: Amaury Séchet <deadalnix at gmail.com> > > Sent...
2019 Aug 26
1
LLVM X86 backend combineIncDecVector's transform
I think DAGToDAG is too late because the build_vector has already been turned into a constant pool load by then so it’s a little difficult to get back. Maybe we can delay it to !DCI.isBeforeLegalizeOps()? That would at least let the first DAG combine and the post type legalization DAG combine see the add, 1. +Sanjay as well From: Amaury Séchet <deadalnix at gmail.com> Sent: Monday, August 26, 2019 10:48 AM To: Topper, Craig <craig.topper at intel.com>; llvm-dev a...
2002 Apr 12
3
Chrooted sftp, did you getting it working?
Le Jeudi 11 Avril 2002 21:09, m.ibarra at cdcixis-na.com a ?crit : > I was curious to know if you had any luck in getting openssh's sftp > server properly configured to allow chrooted sftp logins? I have had > no success and need something quickly. Dear Mike, Unfortunately, I did not succeed to have it work. I got in contact wit...
2008 Jul 14
1
Off topic: Tcl/Tk outside R.
...t with Tcl/Tk *outside* of R to see if I could get the hang of just what Tcl/Tk actually is. (As I said I am floundering; I can't seem to get a conceptual grip on what it's all about.) I discovered a Tcl/Tk ``Cookbook'' by Sastry and Sastry that looked promising. URL: http://www.dci.clrc.ac.uk/Publications/Cookbook/ Tried the first couple of (ultra-simple) examples and they seemed to work. (Amazing, for me.) Then I tried the example on creating an executable file for invoking the Tcl/Tk commands. The instructions said to create a file ``button.tcl'' with a first l...