Displaying 9 results from an estimated 9 matches for "datareg".
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2012 Nov 06
1
Ordered probit using clm2
...variable y is the way of payment in M&A: y=0 if the deal is financed by stock only, y=1 if the deal is financed by a mix of cash and stock and y=2 if it is by cash only.
My independent variables are CollateralB, Cashavailable and Leverage.
This is the code I wrote:
> library(ordinal)
> datareg<-read.xls("C:/regression.xls")
> myprobit<-clm2(Newpercentagecash ~ CollateralB + CashavailableB + LEVERAGEB, data = datareg, link = "probit")
Error in clm2(Newpercentagecash ~ CollateralB + CashavailableB + LEVERAGEB, :
response needs to be a factor
I do not unders...
2017 Jul 27
2
GEP with a null pointer base
...the FLAGS reg in the second select was MCSE’ed to the
earlier CMP in the first select, so here we see the second Select without a CMP:
BB#10: derived from LLVM BB %for.body.5
Predecessors according to CFG: BB#3 BB#9
%vreg49<def> = PHI %vreg47, <BB#9>, %vreg48, <BB#3>; DataRegs:%vreg49,%vreg47,%vreg48
//// <=== this SLLI clobbers FLAGS <============
%vreg46<def> = SLLI %vreg5, 1, %FLAGS<imp-def,dead>; DataRegs:%vreg46,%vreg5
BCC 2, <BB#12>, %FLAGS<imp-use>
Successors according to CFG: BB#11 BB#12...
2017 Jul 28
2
GEP with a null pointer base
...nd select was MCSE’ed to the
> earlier CMP in the first select, so here we see the second Select without a CMP:
>
> BB#10: derived from LLVM BB %for.body.5
> Predecessors according to CFG: BB#3 BB#9
> %vreg49<def> = PHI %vreg47, <BB#9>, %vreg48, <BB#3>; DataRegs:%vreg49,%vreg47,%vreg48
>
> //// <=== this SLLI clobbers FLAGS <============
> %vreg46<def> = SLLI %vreg5, 1, %FLAGS<imp-def,dead>; DataRegs:%vreg46,%vreg5
> BCC 2, <BB#12>, %FLAGS<imp-use>
> Successors acco...
2017 Jul 31
2
GEP with a null pointer base
...d to the
>> earlier CMP in the first select, so here we see the second Select without a CMP:
>>
>> BB#10: derived from LLVM BB %for.body.5
>> Predecessors according to CFG: BB#3 BB#9
>> %vreg49<def> = PHI %vreg47, <BB#9>, %vreg48, <BB#3>; DataRegs:%vreg49,%vreg47,%vreg48
>>
>> //// <=== this SLLI clobbers FLAGS <============
>> %vreg46<def> = SLLI %vreg5, 1, %FLAGS<imp-def,dead>; DataRegs:%vreg46,%vreg5
>> BCC 2, <BB#12>, %FLAGS<imp-use>
>>...
2017 Jul 31
4
GEP with a null pointer base
...t select, so here we see the second Select
>>> without a CMP:
>>>
>>> BB#10: derived from LLVM BB %for.body.5
>>> Predecessors according to CFG: BB#3 BB#9
>>> %vreg49<def> = PHI %vreg47, <BB#9>, %vreg48, <BB#3>;
>>> DataRegs:%vreg49,%vreg47,%vreg48
>>>
>>> //// <=== this SLLI clobbers FLAGS <============
>>> %vreg46<def> = SLLI %vreg5, 1, %FLAGS<imp-def,dead>;
>>> DataRegs:%vreg46,%vreg5
>>> BCC 2, <BB#12>, %F...
2017 Aug 01
0
GEP with a null pointer base
...; earlier CMP in the first select, so here we see the second Select without a CMP:
>>>
>>> BB#10: derived from LLVM BB %for.body.5
>>> Predecessors according to CFG: BB#3 BB#9
>>> %vreg49<def> = PHI %vreg47, <BB#9>, %vreg48, <BB#3>; DataRegs:%vreg49,%vreg47,%vreg48
>>>
>>> //// <=== this SLLI clobbers FLAGS <============
>>> %vreg46<def> = SLLI %vreg5, 1, %FLAGS<imp-def,dead>; DataRegs:%vreg46,%vreg5
>>> BCC 2, <BB#12>, %FLAGS<imp-...
2014 Dec 05
2
[LLVMdev] illegal code generated for special architecture
...etFrameIndex (nothing special)
- I generate a special address-register ADD instruction in eliminateFrameIndex() to write FramePointer + offset into a new address-register
- I use explicit load and store and address-registers in my target instruction patterns:
eg (store (add (load AddressRegs:$a), DataRegs:$b), AddressRegs:$dst)
This works quite well, but if I access an array on the stack (LLVM generates FrameIndex to access it):
int buffer[BUFFER_SIZE];
for(int i = 0; i < end_loop_index; i++) {
buffer[i] = i;
}
then LLVM generates the target instruction "ADD D1, A1, D0"...
2017 Jul 24
2
GEP with a null pointer base
> On Jul 21, 2017, at 10:55 PM, Mehdi AMINI <joker.eph at gmail.com> wrote:
>
>
>
> 2017-07-21 22:44 GMT-07:00 Peter Lawrence <peterl95124 at sbcglobal.net <mailto:peterl95124 at sbcglobal.net>>:
> Mehdi,
> Hal’s transformation only kicks in in the *presence* of UB
>
> No, sorry I entirely disagree with this assertion: I believe we
2009 Dec 15
2
[PATCH 1/2] drm/nouveau: Kill global state in NvShadowBIOS
---
drivers/gpu/drm/nouveau/nouveau_bios.c | 47 ++++++++++++++-----------------
1 files changed, 21 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 5eec5ed..04ac564 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -181,43 +181,42 @@ struct methods {
const char