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2017 Aug 01
3
[cfe-dev] [5.0.0 Release] Release Candidate 1 tagged
On Tue, Aug 1, 2017 at 3:01 AM, Simon Dardis <Simon.Dardis at imgtec.com> wrote: > Currently I'm getting "Couldn't write to remote file "/home/testers/uploads/clang+llvm-5.0.0-rc1-mips-linux-gnu.tar.xz": Failure", > does that account need more space? Yes, the partition is full. I've asked Anton to...
2017 Dec 24
4
Canonical way to handle zero registers?
...ake sure that we don't already have a hook suitable for this. Overriding runOnFunction to run what could be described as just a "late SelectionDAG pass" sounds pretty intrusive. Do you remember other approaches that didn't work? -- Sean Silva On Dec 22, 2017 2:17 PM, "Simon Dardis" <Simon.Dardis at mips.com> wrote: > Hi Sean, > > Have you looked at inheriting from llvm:SelectionDAGISel for your target, > invoking runOnMachineFunction to perform > ISEL, then post processing the output by finding the cases where -1 is > synthesized then used and...
2016 Nov 08
2
[MC] Target-Independent Small Data Section Handling
...dy to add a third argument containing what kind would normally be returned: isGlobalInSmallSectionKind(GO, TM, <nominal-kind-expr>) If a ReadOnly global is better emitted as instruction immediates, then the target can return `false` right then and there. > On Nov 8, 2016, at 07:21, Simon Dardis <Simon.Dardis at imgtec.com> wrote: > > isGlobalInSmallSectionKind
2017 Jan 24
2
[Release-testers] [cfe-dev] [4.0.0 Release] Relase Candidate 1 has been tagged
Hi, Looks ok for native MIPS, I have two failures on debian8: Failing Tests (2): XRay-x86_64-linux :: TestCases/Linux/argv0-log-file-name.cc XRay-x86_64-linux :: TestCases/Linux/fixedsize-logging.cc I'll investigate these failures. Otherwise looks ok. I've uploaded the binaries. 9d5a389c20eb5b3071e6a0504b7cf87d clang+llvm-4.0.0-rc1-mipsel-linux-gnu.tar.xz
2017 Apr 26
2
Buildbot clang-cmake-mips BUG?
在 2017年04月26日 16:51, Simon Dardis 写道: > Hi Leslie, > > I've been seeing those failures as well (I own those buildbots). Like yourself, I'm a bit > uncertain as to why they're occurring. I'm currently investigating. I suspect it's a case > that the build directory has gone stale. Perhaps! and buil...
2018 Jun 15
3
Codeowner for MIPS
Dear community, I will be leaving MIPS on the 20th to pursue other LLVM based endeavours. As such, I am stepping down as code owner. My apologies for the timing with regard to the current release, I had hoped that the process would have be complete by then. I would like to nominate Simon Atanaysan as the new code owner for the MIPS backend. Thanks, Simon -------------- next part
2017 Jul 13
2
Deprecating the experimental microMIPS64R6 backend
Hi all, I plan to deprecate the experimental microMIPS64R6 backend for the 5.0 release and remove it after the release. Currently there are no CPUs that use that particular sub-ISA which makes it difficult to justify the maintenance and parallel development effort. If there was a CPU design produced that did use microMIPS64R6, the backend could be restored from the archive. Any comments or
2016 Jul 20
2
Code owner for Mips
...on to a different LLVM opportunity at Apple a few weeks later. As such, I feel it's time for me to step down as code owner of the Mips target so that we have a single code owner throughout the LLVM 3.9 release which is scheduled to finish just after my last day. I'd like to nominate Simon Dardis as the new code owner. Is that ok with everyone? Vasileios Kalintiris is going to take over my release testing, starting with the 3.9 release. He will also be taking over my buildbots over the next few weeks. Daniel Sanders Leading Software Design Engineer, MIPS Processor IP Imagination Technolo...
2016 Nov 17
3
[MC] Target-Independent Small Data Section Handling
...s.llvm.org/D26345 And lld patch implementing the _SDA_BASE_ symbols and includes an end-to-end test for small data relocations: https://reviews.llvm.org/D26346 I don't have commit access either, so I could use some help with that when ready. Thanks, Jack > On 8 Nov 2016, at 07:21, Simon Dardis <Simon.Dardis at imgtec.com> wrote: > > Hi Jack, > > Thanks for working on this, I think you have the right approach by making this more general. > > I've been looking at your posted patch and I'll post some comments there. > > Thanks, > Simon > &gt...
2019 Feb 26
2
2019 EuroLLVM Registration - Early Bird Rate Ending TODAY!
Hi Simon, The page will be updated later today with the new rate. Kind regards, Arnaud On Tue, Feb 26, 2019 at 12:52 PM Simon Dardis via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, > > The EventBrite page is showing sales have ended, will it be reopening with > the higher rate soon? > > Thanks, > Simon > > On Tue, 26 Feb 2019 at 00:20, Tanya Lattner via llvm-dev < > llvm-dev at li...
2016 Nov 18
0
[MC] Target-Independent Small Data Section Handling
...BASE_ symbols and includes an > end-to-end test for small data relocations: > > https://reviews.llvm.org/D26346 > > I don't have commit access either, so I could use some help with that > when ready. > > Thanks, > Jack > > > On 8 Nov 2016, at 07:21, Simon Dardis <Simon.Dardis at imgtec.com> > > wrote: > > > > Hi Jack, > > > > Thanks for working on this, I think you have the right approach by > > making this more general. > > > > I've been looking at your posted patch and I'll post some comme...
2016 Nov 08
3
[MC] Target-Independent Small Data Section Handling
I've prepared a preliminary patch with the intention of implementing PPC-EABI subtarget features for applications that run in a standalone embedded environment. https://reviews.llvm.org/D26344 The most significant difference compared with the SVR4 ABI is the use of SDA (small data area). This allows full-word constants and data to be grouped into small-data sections accessed using relocated
2018 Feb 27
0
[Release-testers] [6.0.0 Release] Release Candidate 3 tagged
Hi, No major issues seen so far for mips. Binaries uploaded. SHA256(clang+llvm-6.0.0-rc3-mipsel-linux-gnu.tar.xz)= 6e4fab79cc341a9084dab94cced108daff39fcde14a11e8d7ae454e9f92cb77c SHA256(clang+llvm-6.0.0-rc3-mips-linux-gnu.tar.xz)= 54887a039d3d7ccff17a0c7245f4c9d778a1c22f96b619db554849da55293d61 SHA256(clang+llvm-6.0.0-rc3-x86_64-linux-gnu-debian8.tar.xz)=
2018 Feb 13
0
[Release-testers] [6.0.0 Release] Release Candidate 2 tagged
Hi Hans, I'm seeing one unexpected failure: libc++ :: std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp Test logs show: Standard Error: -- terminating with uncaught exception of type std::length_error: basic_string -- but only on my big endian MIPS machine. I have filed PR36373 for the above failure. I've looked at the failures
2017 May 05
2
LLVM 4.0.1-rc1 has been tagged
Hi, I'm seeming new regressions form 4.0.0 for mips big endian: DataFlowSanitizer-mips64 :: custom.cc DataFlowSanitizer-mips64 :: propagate.c SanitizerCommon-asan-mips-Linux :: sanitizer_coverage_trace_pc_guard-dso.cc SanitizerCommon-asan-mips-Linux :: sanitizer_coverage_trace_pc_guard.cc SanitizerCommon-asan-mips64-Linux :: Linux/getpwnam_r_invalid_user.cc
2017 Feb 22
2
Users of MIPS and PowerPC backends in production-class projects?
...ssfully using the backend in Linux. OTOH, FreeBSD is "almost there", and not sure about NetBSD and OpenBSD. In the case of MIPS, would Linux be the most reliable choice, or is any BSD flavour already using the backend successfully? Thanks! ardi On Wednesday, February 22, 2017, Simon Dardis <Simon.Dardis at imgtec.com> wrote: > For MIPS, the common OSes would be Linux/FreeBSD/NetBSD/OpenBSD. > > Endianness is somewhat variable as many MIPS designs have big endian and > little endian variants. Typically you can assume big endian but little > endian is > fairly...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...tension of the MIPS ISA. VMIPS appears to be an implementation of the R3000 that's intended as a teaching tool. Does your MIPS CPU have this extension? > Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector instructions) gather and scatter operations? Simon Dardis would be able to confirm but there aren't any as far as I know. The closest I can think of is in MSA where you can get a similar effect with a sequence of ld.df's and vshf.df's (or pck*.df's, ilv*.df's, etc. for some of the common cases). > If so, can you share with me t...
2017 Dec 22
4
Canonical way to handle zero registers?
I looked around the codebase and didn't see anything that obviously looked like the natural place to turn constant zero immediates into zero-registers (i.e. registers that always return zero when read). Right now we are expanding them in ISelLowering::LowerOperation but that seems too early. The specific issue I'm hitting is that we have a register that reads as -1 and so when we replace
2018 Feb 23
7
[6.0.0 Release] Release Candidate 3 tagged
Dear testers, 6.0.0-rc3 was just tagged, after r325901 on the branch. There are still a few open blockers, but I'm not sure we'll actually end up blocking on all of them. So depending on what comes up, this release candidate is probably pretty close to what the final release will look like (I'm still hoping for more release notes, though). I'm hoping we can get to
2017 Feb 22
6
Users of MIPS and PowerPC backends in production-class projects?
Hi, I'd like to experiment with the MIPS and PowerPC backends, but, considering that they aren't widely used processors, I'd like to start with the same environment (OS/ABI/linker) used by the people who work with these backends. So, what OS/ABI/linker use the people who use these backends for production work? Thanks!!