search for: da6e5b8d

Displaying 3 results from an estimated 3 matches for "da6e5b8d".

2007 Apr 03
0
[LLVMdev] PR400 - alignment for LD/ST
On Apr 2, 2007, at 4:07 PM, Christopher Lamb wrote: > > On Apr 2, 2007, at 5:01 PM, Devang Patel wrote: > >> >> However, that means, for loops this becomes "load is N bytes away >> from a 8-byte aligned data" where N is dependent on IV. I said, this but I am not sure it is OK to say %tmp = load i32* %tmp1, align N > > So in the loop case analysis of
2007 Apr 03
1
[LLVMdev] PR400 - alignment for LD/ST
...ds/stores will likely have to be implemented as an analysis pass and wouldn't need to be represented in the BC or assembly. -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070403/da6e5b8d/attachment.html>
2007 Apr 02
2
[LLVMdev] PR400 - alignment for LD/ST
On Apr 2, 2007, at 5:01 PM, Devang Patel wrote: > > On Apr 2, 2007, at 2:12 PM, Chris Lattner wrote: >> >> Devang, do you have any thoughts on this or idea of how it would >> impact a >> vectorizor? > > When you say "load is multiple of 4 bytes away from a 8-byte aligned > data" > it is not clear whether it is 16-byte aligned or not. However,