Displaying 2 results from an estimated 2 matches for "da2d1f93".
2013 Mar 23
0
[LLVMdev] Simpler types in TableGen isel patterns
On Thu, Mar 21, 2013 at 2:26 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:
> Currently, instruction selection patterns are defined like this:
>
> def : Pat<(and (not GR32:$src1), GR32:$src2),
> (ANDN32rr GR32:$src1, GR32:$src2)>;
> def : Pat<(and (not GR64:$src1), GR64:$src2),
> (ANDN64rr GR64:$src1, GR64:$src2)>;
>
>
2013 Mar 21
9
[LLVMdev] Simpler types in TableGen isel patterns
Currently, instruction selection patterns are defined like this:
def : Pat<(and (not GR32:$src1), GR32:$src2),
(ANDN32rr GR32:$src1, GR32:$src2)>;
def : Pat<(and (not GR64:$src1), GR64:$src2),
(ANDN64rr GR64:$src1, GR64:$src2)>;
TableGen infers the types of $src1 and $src2 from the specified register classes, and that is the only purpose of the register