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2019 Feb 13
2
Intrinsics for RISCV CSR instructions
...seems to be true for PowerPC (no intrinsics for mfdcr/mtdcr) and X86 (no in/out) as well. Are there plans to define standard RISCV intrinsics for this? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190213/d8f473a9/attachment.html>