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2020 Jun 08
2
Mitigating straight-line speculation vulnerability CVE-2020-13844
....llvm.org/D81402: [AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions.
5. https://reviews.llvm.org/D81403: Work around GlobalISel limitation on Indirect Thunks.
6. https://reviews.llvm.org/D81404: [AArch64] Add clang command line support for -mharden-sls=
7. https://reviews.llvm.org/D81405: [AArch64] Avoid incompatibility between SLSBLR mitigation and BTI codegen, by only using X16 and X17 registers for BLRs.
There are a few known places where this toolchain mitigation leaves
instructions unmitigated:
* Some accesses to thread-local variables use a code sequence with a BLR
instruct...