search for: d74338

...where in the RISC-V backend as different releases of the ISA would mean some instructions are enabled or disabled based on one of a set of features being enabled, and such a feature might be useful to other backends too. I have implemented a prototype of this extension in https://reviews.llvm.org/D74338. AssemblerPredicates are used in four parts of TableGen, three of which only affect TableGen'erated code, and one is RISC-V specific so these changes are not very intrusive. For AsmWriterEmitter/MCInstPrinter to work with these changes, I've made what I think may be a minimally distruptive...