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...xtract info from IR before AsmBackend construction, so >> I use some little weird approach to init target-abi option before construct >> AsmBackend[1] or reassign target-abi option in getSubtargetImpl and do some >> hack in backend[2]. >> >> 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy (see llc.cpp) >> 2. https://reviews.llvm.org/D72246 (see RISCVAsmBackend.h) >> >> I think [1] and [2] are not good enough, the other ideals like >> >> 3. encode target abi info in triple name. ex. riscv64-unknown-elf-lp64d >> 4. encode target-...

...rent LLVM design, there is no mechanism to extract info from IR before AsmBackend construction, so I use some little weird approach to init target-abi option before construct AsmBackend[1] or reassign target-abi option in getSubtargetImpl and do some hack in backend[2]. 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy (see llc.cpp) 2. https://reviews.llvm.org/D72246 (see RISCVAsmBackend.h) I think [1] and [2] are not good enough, the other ideals like 3. encode target abi info in triple name. ex. riscv64-unknown-elf-lp64d 4. encode target-abi into in target-feature (maybe it's not a goo...

...design, there is no mechanism to extract info from IR before AsmBackend construction, so I use some little weird approach to init target-abi option before construct AsmBackend[1] or reassign target-abi option in getSubtargetImpl and do some hack in backend[2]. > > 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy <https://reviews.llvm.org/D72245#change-sHyISc6hOqcy> (see llc.cpp) > 2. https://reviews.llvm.org/D72246 <https://reviews.llvm.org/D72246> (see RISCVAsmBackend.h) > > I think [1] and [2] are not good enough, the other ideals like > > 3. encode target...

...there is no mechanism to extract info from IR before AsmBackend construction, so I use some little weird approach to init target-abi option before construct AsmBackend[1] or reassign target-abi option in getSubtargetImpl and do some hack in backend[2]. >> >> 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy <https://reviews.llvm.org/D72245#change-sHyISc6hOqcy> (see llc.cpp) >> 2. https://reviews.llvm.org/D72246 <https://reviews.llvm.org/D72246> (see RISCVAsmBackend.h) >> >> I think [1] and [2] are not good enough, the other ideals like >> >&...

...t is accessible before the Module proper is parsed?) > I'm not sure too. For RISC-V as Sam mention before, it's not easy to add ABI to the triple... but Yes, the target triple is accessible before the Module proper is parsed in current codegen flow. so in my PoC https://reviews.llvm.org/D72245#change-sHyISc6hOqcy, I need to changed the flow but I think static method is not a good idea. > > On Fri, Jan 10, 2020 at 9:09 AM Sam Elliott via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> I also work on the RISC-V backend, and have been doing a little work on &g...

...>>> >> >> I'm not sure too. For RISC-V as Sam mention before, it's not easy to add >> ABI to the triple... but Yes, the target triple is accessible before the >> Module proper is parsed in current codegen flow. >> so in my PoC https://reviews.llvm.org/D72245#change-sHyISc6hOqcy, I need >> to changed the flow but I think static method is not a good idea. >> > > And this too. If the triple from the IR file is used in the places you > need this new ABI parameter, it might inform how best to pass this other > data through too. >...

...proper is parsed?) > > > > I'm not sure too. For RISC-V as Sam mention before, it's not easy to add > ABI to the triple... but Yes, the target triple is accessible before the > Module proper is parsed in current codegen flow. > > so in my PoC https://reviews.llvm.org/D72245#change-sHyISc6hOqcy, I > need to changed the flow but I think static method is not a good idea. > > > > And this too. If the triple from the IR file is used in the places you > need this new ABI parameter, it might inform how best to pass this other > data through too. > &gt...

...no mechanism to extract info from IR before AsmBackend construction, so I use some little weird approach to init target-abi option before construct AsmBackend[1] or reassign target-abi option in getSubtargetImpl and do some hack in backend[2]. >>> >>> 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy (see llc.cpp) >>> 2. https://reviews.llvm.org/D72246 (see RISCVAsmBackend.h) >>> >>> I think [1] and [2] are not good enough, the other ideals like >>> >>> 3. encode target abi info in triple name. ex. riscv64-unknown-elf-lp64d >...

...;>> > I'm not sure too. For RISC-V as Sam mention before, it's not easy to >>> add ABI to the triple... but Yes, the target triple is accessible before >>> the Module proper is parsed in current codegen flow. >>> > so in my PoC https://reviews.llvm.org/D72245#change-sHyISc6hOqcy, I >>> need to changed the flow but I think static method is not a good idea. >>> > >>> > And this too. If the triple from the IR file is used in the places you >>> need this new ABI parameter, it might inform how best to pass this other...

...I use some little weird approach to init target-abi option >>>>>> before construct AsmBackend[1] or reassign target-abi option in >>>>>> getSubtargetImpl and do some hack in backend[2]. >>>>>> >>>>>> 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy (see llc.cpp) >>>>>> 2. https://reviews.llvm.org/D72246 (see RISCVAsmBackend.h) >>>>>> >>>>>> I think [1] and [2] are not good enough, the other ideals like >>>>>> >>>>>> 3. encode target a...

...to init target-abi option >>>>>>>> before construct AsmBackend[1] or reassign target-abi option in >>>>>>>> getSubtargetImpl and do some hack in backend[2]. >>>>>>>> >>>>>>>> 1. https://reviews.llvm.org/D72245#change-sHyISc6hOqcy (see llc.cpp >>>>>>>> ) >>>>>>>> 2. https://reviews.llvm.org/D72246 (see RISCVAsmBackend.h) >>>>>>>> >>>>>>>> I think [1] and [2] are not good enough, the other ideals like >>&g...