Displaying 4 results from an estimated 4 matches for "d70042".
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2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...ion to the subject of this message I got my first round of patches successfully reviewed and committed. As a matter of reference, they are the following:
>
> https://reviews.llvm.org/D69116
> https://reviews.llvm.org/D69120
> https://reviews.llvm.org/D69326
> https://reviews.llvm.org/D70042
>
> They provided hooks in TargetLowering and DAGCombine that enable interested targets to implement a filter for expensive shift operations. The patches work by preventing certain transformations that would result in expensive code for these targets.
>
> I want to express my gratitude...
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...subject of this message I got my first round of patches
> successfully reviewed and committed. As a matter of reference, they are the
> following:
>
> https://reviews.llvm.org/D69116
> https://reviews.llvm.org/D69120
> https://reviews.llvm.org/D69326
> https://reviews.llvm.org/D70042
>
> They provided hooks in TargetLowering and DAGCombine that enable
> interested targets to implement a filter for expensive shift operations.
> The patches work by preventing certain transformations that would result in
> expensive code for these targets.
>
> I want to expres...
2019 Nov 14
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...ot my first round of
>> patches successfully reviewed and committed. As a matter of reference, they
>> are the following:
>>
>> https://reviews.llvm.org/D69116
>> https://reviews.llvm.org/D69120
>> https://reviews.llvm.org/D69326
>> https://reviews.llvm.org/D70042
>>
>> They provided hooks in TargetLowering and DAGCombine that enable
>> interested targets to implement a filter for expensive shift operations.
>> The patches work by preventing certain transformations that would result in
>> expensive code for these targets.
>&g...
2019 Oct 07
4
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
Hi All,
While implementing a custom 16 bit target for academical and demonstration purposes, I unexpectedly found that LLVM was not really ready for 8 bit and 16 bit targets. Let me expose why.
Target backends can be divided into two major categories, with essentially nothing in between:
Type 1: The big 32 or 64 bit targets. Heavily pipelined with expensive branches, running at clock