search for: d69120

Displaying 5 results from an estimated 5 matches for "d69120".

2019 Oct 26
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...; https://bugs.llvm.org/show_bug.cgi?id=43559 <https://bugs.llvm.org/show_bug.cgi?id=43559> https://reviews.llvm.org/D69099 <https://reviews.llvm.org/D69099> (baseline tests) https://reviews.llvm.org/D69116 <https://reviews.llvm.org/D69116> (patch 1) https://reviews.llvm.org/D69120 <https://reviews.llvm.org/D69120> (patch 2) https://reviews.llvm.org/D69326 <https://reviews.llvm.org/D69326> (patch 3) I got the baseline tests and patch 1 accepted and commited by member Sanjay, which was great. However, the remaining patches have remained silent for some time n...
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...llvm-dev at lists.llvm.org> wrote: > > Hi All, > > In relation to the subject of this message I got my first round of patches successfully reviewed and committed. As a matter of reference, they are the following: > > https://reviews.llvm.org/D69116 > https://reviews.llvm.org/D69120 > https://reviews.llvm.org/D69326 > https://reviews.llvm.org/D70042 > > They provided hooks in TargetLowering and DAGCombine that enable interested targets to implement a filter for expensive shift operations. The patches work by preventing certain transformations that would result in e...
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...ts.llvm.org> wrote: > > > Hi All, > > In relation to the subject of this message I got my first round of patches > successfully reviewed and committed. As a matter of reference, they are the > following: > > https://reviews.llvm.org/D69116 > https://reviews.llvm.org/D69120 > https://reviews.llvm.org/D69326 > https://reviews.llvm.org/D70042 > > They provided hooks in TargetLowering and DAGCombine that enable > interested targets to implement a filter for expensive shift operations. > The patches work by preventing certain transformations that would r...
2019 Nov 14
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...>> Hi All, >> >> In relation to the subject of this message I got my first round of >> patches successfully reviewed and committed. As a matter of reference, they >> are the following: >> >> https://reviews.llvm.org/D69116 >> https://reviews.llvm.org/D69120 >> https://reviews.llvm.org/D69326 >> https://reviews.llvm.org/D70042 >> >> They provided hooks in TargetLowering and DAGCombine that enable >> interested targets to implement a filter for expensive shift operations. >> The patches work by preventing certain tran...
2019 Oct 07
4
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
Hi All, While implementing a custom 16 bit target for academical and demonstration purposes, I unexpectedly found that LLVM was not really ready for 8 bit and 16 bit targets. Let me expose why. Target backends can be divided into two major categories, with essentially nothing in between: Type 1: The big 32 or 64 bit targets. Heavily pipelined with expensive branches, running at clock