Displaying 7 results from an estimated 7 matches for "d62".
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262
2011 Jun 09
1
Error: missing values where TRUE/FALSE needed
...s2, suffix3)
d54 = mytwo(inscompany, roots2, suffix3)
d55 = mytwo(prefix, state, roots)
d56 = mytwo(prefix, city, roots)
d57 = mytwo(prefix, cityst, roots)
d58 = mytwo(prefix, inscompany, roots)
d59 = mytwo(prefix2, state, roots)
d60 = mytwo(prefix2, city, roots)
d61 = mytwo(prefix2, cityst, roots)
d62 = mytwo(prefix2, inscompany, roots)
d63 = mytwo(prefix, state, roots2)
d64 = mytwo(prefix, city, roots2)
d65 = mytwo(prefix, cityst, roots2)
d66 = mytwo(prefix, inscompany, roots2)
d67 = mytwo(prefix2, state, roots2)
d68 = mytwo(prefix2, city, roots2)
d69 = mytwo(prefix2, cityst, roots2)
d70 = mytw...
2011 Jun 09
2
Problem with a if statement inside a function
..."prefix", "inscompany", "roots")
d59 = mytwo("prefix2", "state", "roots")
d60 = mytwo("prefix2", "city", "roots")
d61 = mytwo("prefix2", "cityst", "roots")
d62 = mytwo("prefix2", "inscompany", "roots")
d63 = mytwo("prefix", "state", "roots2")
d64 = mytwo("prefix", "city", "roots2")
d65 = mytwo("prefix", "cityst", "roots2&quo...
2011 Jun 09
1
Trying to make code more efficient
..."prefix", "inscompany", "roots")
d59 = mytwo("prefix2", "state", "roots")
d60 = mytwo("prefix2", "city", "roots")
d61 = mytwo("prefix2", "cityst", "roots")
d62 = mytwo("prefix2", "inscompany", "roots")
d63 = mytwo("prefix", "state", "roots2")
d64 = mytwo("prefix", "city", "roots2")
d65 = mytwo("prefix", "cityst", "roots2&quo...
2017 Nov 13
2
Reaching definitions on Machine IR post register allocation
...<ECX>(d4,d184,u246):d49,
> u51<R9B>(d11):u23, u52<ECX>(d4):]
>
> .
>
> .
>
> .
>
> s61: CMP32mr [d62<EFLAGS>!(d58,d80,u205):, u63<RDI>(+d194):u55,
> u64<RSI>(d57):, u65<ECX>(d50):]
>
> This is a test case I was interested in because it shows the partial
> register redefinition scenario in X86 for which more register units
> needed to be added. I have a ha...
2017 Nov 24
2
Reaching definitions on Machine IR post register allocation
..., u52<ECX>(d4):]
>>>
>>> .
>>>
>>> .
>>>
>>> .
>>>
>>> s61: CMP32mr [d62<EFLAGS>!(d58,d80,u205):, u63<RDI>(+d194):u55,
>>> u64<RSI>(d57):, u65<ECX>(d50):]
>>>
>>> This is a test case I was interested in because it shows the partial
>>> register redefinition scenario in X86 for which more register units needed
&...
2009 Mar 09
5
Help
...- DATA LIST LIST / i2(A1) d41(N1) d42(N1) d43(N1) d44(N1) d45(N1)
> > d46(N1) d47(N1) d48(N1) d49(N1) d50(N1) d51(N1) d52(N1) d53(N1)
> > d54(N1) d55(N1) d56(N1) d57(N1) d58(N1) d59(N1) d60(N1) .
> >
> > - RECORD TYPE 'D'.
> > - DATA LIST LIST / i3(A1) d61(N1) d62(N1) d63(N1) d64(N1) d65(N1)
> > d66(N1) d67(N1) d68(N1) d69(N1) d70(N1) d71(N1) d72(N1) d73(N1)
> > d74(N1) d75(N1) d76(N1) d77(N1) d78(N1) d79(N1) d80(N1) .
> >
> > - RECORD TYPE 'E'.
> > - DATA LIST LIST / i4(A1) d81(N1) d82(N1) d83(N1) d84(N1) d85(N1)
> &...
2017 Nov 01
2
Reaching definitions on Machine IR post register allocation
Hi Geoff/Krzyssztof,
Wouldn't the isRenamable() change be required even for the RDF based copy propagation? Maybe Hexagon does not impose ABI/ISA restrictions which require specific registers to be used in specific contexts.
Also, if Geoff's copy propagation pass is invoked post-RA wouldn't it need to handle the x86 ISA feature which allows 8 bit/16 bit values to be moved into a