search for: d46656

...rough optimization? We are failing that test in the loop-invariant C example presented here. We're also failing that test when operands have different sizes. Rotate goes in, logic and shifts come out. We even failed that test for an even more basic case before this fix: https://reviews.llvm.org/D46656 We may still be failing the basic case for other source languages/flavors because encoding this operation in existing IR ops isn't obvious? Another informal measure is: how do programmers express this operation without a builtin? If they're resorting to inline asm, that's a strong sign...

On 2018-05-16 00:34, Sanjay Patel via llvm-dev wrote: > Vectorization goes overboard because the throughput cost model used by > the > vectorizers doesn't match the 6 IR instructions that correspond to 1 > x86 > rotate instruction. Instead, we have: > > [...] > > The broken cost model also affects unrolling and inlining. Size costs > are > overestimated