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Hi! I'm developing a register allocator that works iteratively. It spills some virtual registers on each iteration until all the rest have physical ones assigned. How can I spill some live intervals at the end of each iteration with new live intervals having correct weights? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL:

On Sun, 6 Aug 2006, Anton Vayvod wrote: > I'm developing a register allocator that works iteratively. It spills some > virtual registers on each iteration until all the rest have physical ones > assigned. Take a look at the linear scan allocator. It is also iterative: it uses the spiller interface to insert spill code, which creates (unspillable) intervals for the spill code it

...don't need to allocate physical registers for them, right? Shoud hasStackSlot method of VirtRegMap return true for these intervals' reg members? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20060821/d306aec5/attachment.html>