search for: d30416

...ooks fine. > > > Why can't we expect InstCombine to simplify this to an 8 bit load, > assuming each of %0 and %1 has only one use ? > > We don't aggressively narrow loads and stores in IR because it tends to block other optimizations. See https://reviews.llvm.org/D30416. -Eli -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachme...

...ies of bit operations. We call such reverse transformation legal type bitfield shrinking. Currently, llvm depends on DAGCombiner to do such shrinking. However, DAGCombiner has the one-basic-block-a-time limitation, so we started to implement a new shrinking optimization in https://reviews.llvm.org/D30416, and initially put it in instcombine, then moved it to CGP because we want to use some TargetLowering information. The initial implementation in D30416 only supports load-and-or-store pattern matching, and it uses a inst-by-inst scan as a safety check to make sure there is no other memory write in...

...ation legal >> type bitfield shrinking. Currently, llvm depends on DAGCombiner to do >> such shrinking. >> >> However, DAGCombiner has the one-basic-block-a-time limitation, so we >> started to implement a new shrinking optimization in >> https://reviews.llvm.org/D30416, and initially put it in instcombine, >> then moved it to CGP because we want to use some TargetLowering >> information. >> >> The initial implementation in D30416 only supports load-and-or-store >> pattern matching, and it uses a inst-by-inst scan as a safety check to...

...ation legal >> type bitfield shrinking. Currently, llvm depends on DAGCombiner to do >> such shrinking. >> >> However, DAGCombiner has the one-basic-block-a-time limitation, so we >> started to implement a new shrinking optimization in >> https://reviews.llvm.org/D30416, and initially put it in instcombine, >> then moved it to CGP because we want to use some TargetLowering >> information. >> >> The initial implementation in D30416 only supports load-and-or-store >> pattern matching, and it uses a inst-by-inst scan as a safety check to...

Hi Mats, It's private backend. I will try describing what I am dealing with. struct S { unsigned int a : 8; unsigned int b : 8; unsigned int c : 8; unsigned int d : 8; unsigned int e; } We want to read S->b for example. The size of struct S is 64 bits, and seems LLVM treats it as i64. Below is the IR corresponding to S->b, IIRC. %0 = load