Displaying 2 results from an estimated 2 matches for "d2fd74ed".
2007 Nov 06
0
[LLVMdev] allocating registers less "sparingly"
On Nov 5, 2007, at 2:55 AM, Pekka Jääskeläinen wrote:
> Hello LLVM people,
>
> Our customizable TTA target [1] is capable of having plenty of
> registers
> and register file ports to improve instruction level parallelism and
> reduce spills. It's totally up to the designer of the particular TTA
> processor how much the processor has registers and register file
>
2007 Nov 05
6
[LLVMdev] allocating registers less "sparingly"
Hello LLVM people,
Our customizable TTA target [1] is capable of having plenty of registers
and register file ports to improve instruction level parallelism and
reduce spills. It's totally up to the designer of the particular TTA
processor how much the processor has registers and register file resources
along with other TTA components.
We have ported LLVM 2.1 to produce an intermediate TTA