search for: d24631

...; On Tue, Sep 20, 2016 at 10:32 AM, Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > I have posted a patch that switches the API to one that supports this (yet non-existent functionality) earlier: > https://reviews.llvm.org/D24631 <https://reviews.llvm.org/D24631> > > The comments from that were incorporated into the following RFC. > > > Motivation: > > Certain targets feature "variable-sized" registers, i.e. a situation where the register size can be configured by a hardware switch....

I have posted a patch that switches the API to one that supports this (yet non-existent functionality) earlier: https://reviews.llvm.org/D24631 The comments from that were incorporated into the following RFC. Motivation: Certain targets feature "variable-sized" registers, i.e. a situation where the register size can be configured by a hardware switch. A common instruction set would then operate on these registers regardles...

Hi LLVM developers, Don't be quiet :) we need your suggestions for supporting custom CCState, CCAssignFn in D41700. And also RegisterBank in D41653. because it needs to consider about how to support variable-sized register classes concept implemented in D24631. And I think you might have same question when porting to GlobalISel for your Targets, so please give us some directions, thanks a lot! 在 2018年01月04日 06:00, Alex Bradbury 写道: > This question came about through reviewing work from Leslie Zhai on GlobalISel > support for RISC-V, which also...

...gt; Hi LLVM developers, > > Don't be quiet :) we need your suggestions for supporting custom > CCState, CCAssignFn in D41700. > > And also RegisterBank in D41653. because it needs to consider about > how to support variable-sized register classes concept implemented in > D24631. > > And I think you might have same question when porting to GlobalISel > for your Targets, so please give us some directions, thanks a lot! > > > 在 2018年01月04日 06:00, Alex Bradbury 写道: >> This question came about through reviewing work from Leslie Zhai on >> Global...

This question came about through reviewing work from Leslie Zhai on GlobalISel support for RISC-V, which also motivated me to revisit code which I've always felt was a bit clunky. Calling convention lowering in LLVM is typically handled by functions conforming to the CCAssignFn typedef: typedef bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT,

Hi all, Over the past few months we’ve been doing work on the foundations for the next stages of GlobalISel development. In terms of changes from this time last year, the IR translator, the legalizer, and instruction selector have seen moderate to major changes. The most significant of these was the change to the legalizer API, allowing targets to use predicates to express legality, which gives