search for: d24

Displaying 20 results from an estimated 24 matches for "d24".

Did you mean: 24
2016 Jul 30
2
Cannot compile speexdsp 1.2rc3 on ARM64
...w[ret], s0\n" > : [ret] "=&r" (ret) > : [a] "w" (a) > : "v0" ); > return ret; > } > #elif defined(__ARM_NEON__) > static inline int32_t saturate_32bit_to_16bit(int32_t a) { > int32_t ret; > asm volatile ("vmov.s32 d24[0], %[a]\n" > "vqmovn.s32 d24, q12\n" > "vmov.s16 %[ret], d24[0]\n" > : [ret] "=&r" (ret) > : [a] "r" (a) > : "q12", "d24", "d25" ); > return ret; > } > #else > static...
2015 Mar 28
4
Cannot compile speexdsp 1.2rc3 on ARM64
Hi all, I build successfully with speex-1.2rc2. And with speexdsp 1.2rc3, I build with i386, X86_64, armv7 and armv7s all passed. But when I build for ARM64 (for iPhone 6), it failed with: /Applications/Xcode.app/Contents/Developer/usr/bin/make all-recursive Making all in libspeexdsp CC preprocess.lo CC jitter.lo CC mdf.lo CC fftwrap.lo CC
2016 Apr 19
0
Cannot compile speexdsp 1.2rc3 on ARM64
...;sxtl v0.4s, v0.4h\n" "fmov %w[ret], s0\n" : [ret] "=&r" (ret) : [a] "w" (a) : "v0" ); return ret; } #elif defined(__ARM_NEON__) static inline int32_t saturate_32bit_to_16bit(int32_t a) { int32_t ret; asm volatile ("vmov.s32 d24[0], %[a]\n" "vqmovn.s32 d24, q12\n" "vmov.s16 %[ret], d24[0]\n" : [ret] "=&r" (ret) : [a] "r" (a) : "q12", "d24", "d25" ); return ret; } #else static inline int32_t saturate_32bit_to_16bit(int32_...
2016 Aug 09
0
Cannot compile speexdsp 1.2rc3 on ARM64
...ret] "=&r" (ret) >> : [a] "w" (a) >> : "v0" ); >> return ret; >> } >> #elif defined(__ARM_NEON__) >> static inline int32_t saturate_32bit_to_16bit(int32_t a) { >> int32_t ret; >> asm volatile ("vmov.s32 d24[0], %[a]\n" >> "vqmovn.s32 d24, q12\n" >> "vmov.s16 %[ret], d24[0]\n" >> : [ret] "=&r" (ret) >> : [a] "r" (a) >> : "q12", "d24", "d25" ); >> return ret; >&g...
2009 Jan 22
3
Failure to boot from zfs on Sun v880
.... I am trying to move the root volume from an existing svm mirror to a zfs root. The machine is a Sun V880 (SPARC) running nv_96, with OBP version 4.22.34 which is AFAICT the latest. The svm mirror was constructed as follows / d4 m 18GB d14 d14 s 35GB c1t0d0s0 d24 s 35GB c1t1d0s0 swap d3 m 16GB d13 d13 s 16GB c1t0d0s3 d13 s 16GB c1t1d0s3 /var d5 m 8.0GB d15 d15 s 16GB c1t0d0s1 d25 s 16GB c1t1d0s1 I removed c1t1d0 from the mirror: # metadetach d4 d24 # me...
2011 Jun 09
1
Error: missing values where TRUE/FALSE needed
...yone(prefix, roots) d14 = myone(prefix2, roots) d15 = myone(prefix, roots2) d16 = myone(prefix2, roots2) d17 = myone(roots, suffix) d18 = myone(roots, suffix2) d19 = myone(roots, suffix3) d20 = myone(roots2, suffix) d21 = myone(roots2, suffix2) d22 = myone(roots2, suffix3) d23 = myone(state, roots) d24 = myone(city, roots) d25 = myone(cityst, roots) d26 = myone(inscompany, roots) d27 = myone(state, roots2) d28 = myone(city, roots2) d29 = myone(cityst, roots2) d30 = myone(inscompany, roots2) d31 = mytwo(state, roots, suffix) d32 = mytwo(city, roots, suffix) d33 = mytwo(cityst, roots, suffix) d34 =...
2013 Oct 14
1
[LLVMdev] Vectorization of pointer PHI nodes
...op to 14 test.c:11: note: LOOP VECTORIZED. The result is a very concise and very dense code: vld1.8 {d28[], d29[]}, [r5] vld3.8 {d16, d18, d20}, [r9]! vld3.8 {d17, d19, d21}, [r9] vmvn q3, q8 vmvn q15, q9 vmvn q8, q10 vsub.i8 q11, q3, q14 vsub.i8 q12, q15, q14 vsub.i8 q13, q8, q14 vst3.8 {d22, d24, d26}, [r8]! vst3.8 {d23, d25, d27}, [r8] cheers, --renato -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131014/a05ed9f0/attachment.html> -------------- next part -------------- A non-text attachment wa...
2012 Sep 21
0
[LLVMdev] Question about LLVM NEON intrinsics
On 21 September 2012 09:28, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > declare <16 x float> @llvm.arm.neon.vmaxs.v16f32(<16 x float>, <16 x float>) nounwind readnone > > llc fails with following message: > > SplitVectorResult #0: 0x2258350: v16f32 = llvm.arm.neon.vmaxs 0x2258250, 0x2258050, 0x2258150 [ORD=3] [ID=0] > > LLVM ERROR: Do not
2008 Sep 09
1
creating table of averages
...; "c22" "c23" [25] "c31" "c32" "c33" "d11" "d12" "d13" [31] "d14" "d21" "d22" "d23" "d24" "d25" [37] "d31" "d32" "d33" "e11" "e12" "e13" [43] "e21" "e22" "e23" "e31" "e32"...
2012 Sep 21
2
[LLVMdev] RE : Question about LLVM NEON intrinsics
...llowing code: vaddf32: @ @vaddf32 @ BB#0: add r12, r1, #48 add r3, r2, #32 vld1.64 {d20, d21}, [r3, :128] add r3, r2, #48 vld1.64 {d16, d17}, [r2, :128] add r2, r2, #16 vld1.64 {d18, d19}, [r1, :128] vld1.64 {d26, d27}, [r12, :128] add r12, r1, #32 vld1.64 {d24, d25}, [r3, :128] add r1, r1, #16 vadd.f32 q11, q9, q8 vld1.64 {d28, d29}, [r12, :128] vadd.f32 q9, q13, q12 vadd.f32 q8, q14, q10 vld1.64 {d20, d21}, [r2, :128] vld1.64 {d24, d25}, [r1, :128] add r1, r0, #48 vadd.f32 q10, q12, q10 vst1.64 {d22, d23}, [r0, :128] vst1.64 {d18, d19}, [r1,...
2013 Oct 21
1
[LLVMdev] MI scheduler produce badly code with inline function
Hi Andy, I'm working on defining new machine model for my target, But I don't understand how to define the in-order machine (reservation tables) in new model. For example, if target has IF ID EX WB stages should I do: let BufferSize=0 in { def IF: ProcResource<1>; def ID: ProcResource<1>; def EX: ProcResource<1>; def WB: ProcResource<1>; } def :
2010 Jan 18
1
[LLVMdev] JIT on ARM
...p-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead> 0xeb000000 JIT: 0x4512e028: %R0<def> = LDR %SP, %reg0, 4, 14,...
2011 Jun 09
2
Problem with a if statement inside a function
...t;) d19 = myone("roots", "suffix3") d20 = myone("roots2", "suffix") d21 = myone("roots2", "suffix2") d22 = myone("roots2", "suffix3") d23 = myone("state", "roots") d24 = myone("city", "roots") d25 = myone("cityst", "roots") d26 = myone("inscompany", "roots") d27 = myone("state", "roots2") d28 = myone("city", "roots2") d29 = myone(&quot...
2012 Apr 02
7
Calculating NOEL using R and logistic regression - Toxicology
Hello, I used the glm function in R to fit a dose-response relationship and then have been using dose.p to calculate the LC50, however I would like to calculate the NOEL (no observed effect level), ie the lowest dose above which responses start occurring. Does anyone know how to do this? [[alternative HTML version deleted]]
2011 Jun 09
1
Trying to make code more efficient
...t;) d19 = myone("roots", "suffix3") d20 = myone("roots2", "suffix") d21 = myone("roots2", "suffix2") d22 = myone("roots2", "suffix3") d23 = myone("state", "roots") d24 = myone("city", "roots") d25 = myone("cityst", "roots") d26 = myone("inscompany", "roots") d27 = myone("state", "roots2") d28 = myone("city", "roots2") d29 = myone(&quot...
2006 May 18
3
ActiveRecord after save new and old values
I want to write a function that after an ActiveRecord saves successfully, can show me what the before and after values of a particular column are. Is this possible without creating a separate object before modifying the current one? -John
2012 Sep 21
5
[LLVMdev] Question about LLVM NEON intrinsics
Hi all, I would like to know if LLVM Neon intrinsics are designed to support only 'Legal' types for NEON units. Using llc -march=arm -mcpu=cortex-a9 vmax4.ll -o vmax4.s on following ll code: ; ModuleID = 'vmax.ll' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" target triple =
2013 Oct 14
0
[LLVMdev] Vectorization of pointer PHI nodes
Renato, can you post the c code for the function and the assembly that gcc produces? Your initial example could be well handled by vectorization of strided loops (and the mentioning of VLD3(.8?)/VST3(.8?) lead me to assume that this is what happened). But the LLVM-IR you sent has a store of 0 in there ;) and strides by 4. Thanks, Arnold Vectorization of strided loops: I am using float as the
2009 Aug 03
13
kernel BUG at arch/x86/xen/multicalls.c:103!
Hi, I have this bug when I activate java-6-jdk on Tomcat 5.5.26 in a Lenny Guest : Jul 31 21:24:15 tomcat01 kernel: 1 multicall(s) failed: cpu 3 Jul 31 21:24:15 tomcat01 kernel: call 1/1: op=14 arg=[b7f1a000] result=-22 Jul 31 21:24:15 tomcat01 kernel: ------------[ cut here ]------------ Jul 31 21:24:15 tomcat01 kernel: kernel BUG at arch/x86/xen/multicalls.c:103! Jul 31 21:24:15 tomcat01
2013 Oct 14
4
[LLVMdev] Vectorization of pointer PHI nodes
This is almost ideal for SLP vectorization, except for two problems: 1. We have 4 stores to consecutive locations, but the last element is the constant zero, and not an additional SUB. At the moment we don’t have support for idempotence operations, but this is something that we should add. 2. The values that we are subtracting come from 3 loads. We usually load 4 elements from memory, or