search for: d15690

It seems that http://reviews.llvm.org/D15690 only implemented gather/scatter for AVX-512, but not for AVX/AVX2. Is there any plan to enable gather for AVX/2? Thanks. Best, Zhi On Thu, Feb 25, 2016 at 8:28 AM, Sanjay Patel <spatel at rotateright.com> wrote: > I don't think gather has been enabled for AVX2 as of r261875. > Ma...

...c:* Demikhovsky, Elena <elena.demikhovsky at intel.com>; Nema, Ashutosh < > Ashutosh.Nema at amd.com>; llvm-dev <llvm-dev at lists.llvm.org> > > *Subject:* Re: [llvm-dev] how to force llvm generate gather intrinsic > > > > It seems that http://reviews.llvm.org/D15690 only implemented > gather/scatter for AVX-512, but not for AVX/AVX2. Is there any plan to > enable gather for AVX/2? Thanks. > > > > Best, > > Zhi > > > > On Thu, Feb 25, 2016 at 8:28 AM, Sanjay Patel <spatel at rotateright.com> > wrote: > > I don&...

...el <spatel at rotateright.com> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com>; Nema, Ashutosh <Ashutosh.Nema at amd.com>; llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] how to force llvm generate gather intrinsic It seems that http://reviews.llvm.org/D15690 only implemented gather/scatter for AVX-512, but not for AVX/AVX2. Is there any plan to enable gather for AVX/2? Thanks. Best, Zhi On Thu, Feb 25, 2016 at 8:28 AM, Sanjay Patel <spatel at rotateright.com<mailto:spatel at rotateright.com>> wrote: I don't think gather has been enabl...

...ions (vpmaskmovd/q), just with domain crossing penalties thrown in. I think we do this for other missing integer ops for an AVX1 target either in x86 lowering or in the tablegen patterns. Elena - I'm not too familiar with the vectorizers or scatter/gather, but I'll certainly take a look at D15690. Thanks for pointing out the patch! --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly pr...

...with domain crossing penalties thrown in. I think we > do this for other missing integer ops for an AVX1 target either in x86 > lowering or in the tablegen patterns. > > Elena - I'm not too familiar with the vectorizers or scatter/gather, but > I'll certainly take a look at D15690. Thanks for pointing out the patch! > > > > --------------------------------------------------------------------- > Intel Israel (74) Limited > > This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or...

...I did not switch-on masked_load/store to AVX1, I can do this. 2) I did not switch-on masked gather on AVX2 because the instruction is slow. There is no scatter on AVX2. 3) Currently, gather/scatter does not work on SKX because the patch is still under review http://reviews.llvm.org/D15690. I’d be happy if you agree to review it. - Elena From: zhi chen [mailto:zchenhn at gmail.com] Sent: Saturday, January 23, 2016 02:58 To: Sanjay Patel <spatel at rotateright.com<mailto:spatel at rotateright.com>> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com<ma...

...lena.demikhovsky at intel.com>; Nema, Ashutosh < >> Ashutosh.Nema at amd.com>; llvm-dev <llvm-dev at lists.llvm.org> >> >> *Subject:* Re: [llvm-dev] how to force llvm generate gather intrinsic >> >> >> >> It seems that http://reviews.llvm.org/D15690 only implemented >> gather/scatter for AVX-512, but not for AVX/AVX2. Is there any plan to >> enable gather for AVX/2? Thanks. >> >> >> >> Best, >> >> Zhi >> >> >> >> On Thu, Feb 25, 2016 at 8:28 AM, Sanjay Patel <spatel at...

...ions (vpmaskmovd/q), just with domain crossing penalties thrown in. I think we do this for other missing integer ops for an AVX1 target either in x86 lowering or in the tablegen patterns. Elena - I'm not too familiar with the vectorizers or scatter/gather, but I'll certainly take a look at D15690. Thanks for pointing out the patch! --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly pro...

...with domain crossing penalties thrown in. I think we > do this for other missing integer ops for an AVX1 target either in x86 > lowering or in the tablegen patterns. > > Elena - I'm not too familiar with the vectorizers or scatter/gather, but > I'll certainly take a look at D15690. Thanks for pointing out the patch! > > > > --------------------------------------------------------------------- > Intel Israel (74) Limited > > This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or...

Thanks for your response, Sanjay. I know there are intrinsics available in C/C++. But the problem is that I want to instrument my code at the IR level and generate those instructions. I don't want to touch the source code. Best, Zhi On Fri, Jan 22, 2016 at 4:54 PM, Sanjay Patel <spatel at rotateright.com> wrote: > I was just looking at the related masked load/store operations, and