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...ormat to allow using the instruction scheduler for operation triggered architectures (with a proof of concept for the Cell SPU), several code generator improvements and plenty of bug fixes. See the CHANGES file for a more thorough change listing. Acknowledgements ---------------- Thanks to Tomasz Czajkowski of Altera for ensuring the TCE project is allowed to use the VHDL wrappers for certain Altera IP blocks in the Platform Integrator tool. This made the TCE's Altera FPGA support more robust. Many thanks to Hervé Yviquel and Vinogradov Vyacheslav who submitted their first TCE patches to this rel...

...quot;interfaces" property due to "spam" in log.nmbd lines like this: [2014/11/17 16:27:01, 0] nmbd/nmbd_packets.c:759(queue_query_name) queue_query_name: interface 1 has NULL IP address ! Could you help me figuring out what is the source of this fails? -- Greetings, Marcin Czajkowski