search for: cyclones

Hi there: We have recently inherited a circa 1996 SGI Indy Colorbus Cyclone running on Irix. Our intention is to use this unit to drive our Canon CLC900 Scanner Copier and make it accessible to our Windows Network. At the moment, our Windows Network does not "see" the Cyclone & vice versa. I have read that installing some kind of Windows Samba client onto our windows

All, I installed the new version of samba on my Redhat 9.0 server. I have samba running on another Redhat 9.0 server and the version of samba on that box is 3.0.21c-1 and this server has successfully joined a W2K Domain. I am trying to migrate the data from the host that works to the new host. Here are the steps that I have taken to try and join to the domain. 1. rpm -i -vv

I have a high end IBM system with 4 HT CPUs, am running xen-unstable with only Dom0 active, and I get lots of "Timer ISR/n: Time went backwards" messages. This is a short segment from dmesg: Timer ISR/1: Time went backwards: -259000 4465110000000 9741000 4465120000000 Timer ISR/6: Time went backwards: -224000 4465110000000 9776000 4465120000000 Timer ISR/6: Time went backwards: -159000

Hi, I need to derive a time series that represents the first derivative of an original time series. The function coefDeriv in the cyclones package seemed to be the ticket, but I'm not sure if I am interpreting the output of the function correctly...or even using the function correctly. This is a snipbit of what I've been trying: -------- library(cyclones) ## read in my 1-column of values, each line is a different time step t...

Hi, Now I am working on BCC Cross-compiler in order to get the binaries for LEON3 (Google SoC 2007). I changed these lines of Makefile ... CC = gcc CPP = gcc -E ... to these : CC = sparc-elf-gcc -mv8 -msoft-float CPP = sparc-elf-gcc -mv8 -msoft-float -E The options means: -mv8 : generate SPARC V8 instructions -msoft-float : emulate floating-point When I run "make", there is a

Hi all, As of r232885 I've removed the argument-less TargetMachine::getSubtarget and TargetMachine::getSubtargetImpl. For the targets that aren't completely independent of this I've gone ahead and left a non-virtual version of the function in the target specific TargetMachine. What this means in practice is that those targets can only use a bare getSubtarget call in their target

On Fri, May 19, 2017 at 4:01 PM Adam Nemet via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I will run it on Cyclone/AArch64 next week. > FYI, we're still waiting on these Adam... -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170530/7cb390ca/attachment.html>

Ping. Can I assume that we're ok with this interface proposal then? Amara -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140127/49962cbc/attachment.html>

Hi, I've got pxelinux 2.00 working to boot rh 7.3, 8.0, and phoebe-beta pxe install images but I've recently tried to load the rh 9 pxe install images and I get this.. 4000 AX:0208 BX:0200 CX:0002 DX:0000. Any thoughts? Thanks aaron

Hi, I was looking at some AArch64 benchmarks and noticed some simple cases where addresses are being folded into the address mode computations and was curious as to why. In particular, consider the following simple example: void f2(unsigned long *x, unsigned long c) { x[c] *= 2; } This generates: lsl x8, x1, #3 ldr x9, [x0, x8] lsl x9, x9, #1 str x9, [x0, x8] Given the two

[resending to correct llvm-dev address] Hi, I’d like to start enabling the loop data prefetch pass for Cyclone (an ARM64 subtarget). AFAICT, you can’t really add passes specifically to a subtarget but only to a target. This makes sense because in the new world, you could have different subtargets per function. I just want to make sure my understanding is correct. My plan is to add the pass

On Thu, 19 Jun 2008 09:44:46 +0300, Török Edwin wrote: > Hi, > > Have you seen this: http://gcc.gnu.org/ml/gcc/2008-06/msg00385.html > There is a new branch for converting gcc to C++. > > Best regards, > --Edwin The sad thing is that they seem to be replacing one unsafe language with another, presumably with enormous effort. The only hopeful sign in that thread is the

Hi, Have you seen this: http://gcc.gnu.org/ml/gcc/2008-06/msg00385.html There is a new branch for converting gcc to C++. Best regards, --Edwin

Hi, Indeed, the complex add is more expensive on all Cortex cores I know of. However there is an important point here that the code sequence we generate requires two registers live instead of one. In high regpressure loops, were probably losing performance. James On Wed, 11 Nov 2015 at 21:09, Tim Northover via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 11 November 2015 at

Hi, Recently, I committed a patch adding default features for '-mcpu'. And after that, Eric replied me here's a proposal toward using '-march' instead of '-mcpu'. As it's half a year later from original proposal, some background may changes. One thing worth to mention is, during this time, Apple Contributed its backend and introduced another new CPU type: cyclone.

...pos = "http://cran.cnr.berkeley.edu/") #failPackages is the "black list". Things get inserted for various reasons #rejected because they don't build on my system as of July, 2005, or are obviously not needed failPackages1 <- c("BRugs","tclkt2","cyclones","rpvm","ncdf","gtkDevice","gap","gnomeGUI","mimR","pathmix","rcdd","rgdal","rpvm","Rmpi","RQuantLib","RMySQL", "RNetCDF","RODBC","ROracle&...

Dear all: Does anyone has harmonic regresssion analysis package written in R (to be used in Windows platform) ? Thanks _______________________________________ YM - Â÷½u°T®§ ´Nºâ§A¨S¦³¤Wºô¡A§AªºªB¤Í¤´¥i¥H¯d¤U°T®§µ¹§A¡A·í§A¤Wºô®É´N¯à¥ß§Y¬Ý¨ì¡A¥ô¦ó»¡¸Ü³£ÉN¨«¥¢¡C http://messenger.yahoo.com.hk [[alternative HTML version deleted]]

I've plugged in two 3com OfficeConnect 10/100 3CSOHO100B-TX in my freebsd 4.8 box and they are not detected. Do I have to enable some support in the kernel ? Cheers Hannes

Hi all, A bunch of us met at EuroLLVM to discuss the planned merge of the two current AArch64 backends in the tree. The primary question was which backend should form the basis of the merge (since the core .td files aren't directly mergeable), with code being cherry-picked from the other on a case-by-case basis. There were factors to consider both ways, but I think the key points of interest

Hi all, It’s been two weeks since I sent the last merge progress email, so here is an update. TL;DR: Almost done! Tim is considering suggesting making the final switchover sometime next week. This would be the final push, where AArch64 gets deleted and ARM64 gets renamed to AArch64, and would signal the end of the merge process. If any of you know of any reason why these two loving