search for: cvtsi2sd

Hello LLVMer's I am now trying to fix a bug PR9473. sitofp instruction in LLVM IR is converted to vcvtsi2sd(also applied to vcvtsi2ss case) for x86/AVX backend, but vcvtsi2sd is somewhat odd instruction format. VCVTSI2SD xmm1, xmm2, r/m32 VCVTSI2SD xmm1, xmm2, r/m64 bits(127:64) of xmm2 is copied to corresponding bits of xmm1, thus in many case xmm1 and xmm2 could be same register. Currently, the defi...

...47 0xfffffd7ff9302538: mov %rdi,%rbx 0xfffffd7ff930253b: xor %r14d,%r14d 0xfffffd7ff930253e: mov $0x2d6,%edx 0xfffffd7ff9302543: mov %rbx,%rdi 0xfffffd7ff9302546: mov %r14d,%esi >>> 0xfffffd7ff9302549: callq 0xfffffd800066f690 0xfffffd7ff930254e: cvtsi2sd %rax,%xmm0 0xfffffd7ff9302553: mov $0xfffffd7ff93024d0,%rax 0xfffffd7ff930255d: movsd (%rax),%xmm1 0xfffffd7ff9302561: movsd %xmm1,(%rsp) 0xfffffd7ff9302566: mulsd %xmm1,%xmm0 (gdb) x/i 0xfffffd800066f690 0xfffffd800066f690: Cannot access memory at address 0xfffffd800066f...

...to CFG: 0x8c53a90 0x8c55b50 MOV32mi %EBP, 1, %NOREG, -224, <ga:DataStore> %EAX = MOV32rm %EBP, 1, %NOREG, -224 %EAX = ADD32ri8 %EAX, 40 MOV32mi %EAX, 1, %NOREG, 0, 0 MOV32mi %EAX, 1, %NOREG, 4, 1075576832 %ESP = SUB32ri %ESP, 16 %XMM0 = CVTSI2SDrr %EDI MOVSDmr %ESP, 1, %NOREG, 0, %XMM0 MOV32mr %EBP, 1, %NOREG, -268, %ESP ADD32mi8 %EBP, 1, %NOREG, -268, 4294967288 %ESP = MOV32rm %EBP, 1, %NOREG, -268 %ESI = MOV32rm %EBP, 1, %NOREG, -224 %ESI = ADD32ri8 %ESI, 16 MOV32mi %ESI, 1, %NOREG,...

...v    %rdi,%rbx > 0xfffffd7ff930253b:     xor    %r14d,%r14d > 0xfffffd7ff930253e:     mov    $0x2d6,%edx > 0xfffffd7ff9302543:     mov    %rbx,%rdi > 0xfffffd7ff9302546:     mov    %r14d,%esi >>>> 0xfffffd7ff9302549:     callq  0xfffffd800066f690 > 0xfffffd7ff930254e:     cvtsi2sd %rax,%xmm0 > 0xfffffd7ff9302553:     mov    $0xfffffd7ff93024d0,%rax > 0xfffffd7ff930255d:     movsd  (%rax),%xmm1 > 0xfffffd7ff9302561:     movsd  %xmm1,(%rsp) > 0xfffffd7ff9302566:     mulsd  %xmm1,%xmm0 > > (gdb) x/i 0xfffffd800066f690 > 0xfffffd800066f690:     Cannot access...

...^ 8048983: e8 40 fe ff ff call 80487c8 <rand at plt> 8048988: 89 c7 mov %eax,%edi 804898a: 8b 5d f0 mov -0x10(%ebp),%ebx 804898d: 0f af de imul %esi,%ebx 80489a0: f2 0f 2a c7 cvtsi2sd %edi,%xmm0 80489a4: f2 0f 5e 05 f0 8a 04 divsd 0x8048af0,%xmm0 80489ab: 08 80489b5: f2 0f 2c f0 cvttsd2si %xmm0,%esi 80489b9: 01 de add %ebx,%esi I hope that makes it clearer... ;-) BTW, any hints to my cross-compilation-related question? Best...

On May 31, 2011, at 10:36 AM, trash-stuff at gmx.de wrote: > On 31.05.2011 19:22, Devang Patel wrote: >> >> >> On May 30, 2011, at 11:11 AM, trash-stuff at gmx.de wrote: >> >>> Hi all, >>> >>> I am processing DWARF line and column information in (x86 and ARM) executables in order to produce a mapping from the machine instructions back to

On 31.05.2011 19:22, Devang Patel wrote: > > On May 30, 2011, at 11:11 AM, trash-stuff at gmx.de > <mailto:trash-stuff at gmx.de> wrote: > >> Hi all, >> >> I am processing DWARF line and column information in (x86 and ARM) >> executables in order to produce a mapping from the machine >> instructions back to the original source code (C/C++). Using