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Wide load/store optimization question
2017 Jun 16
2
Wide load/store optimization question
...you to do the load/store merging before register allocation without the register constraints. ​Our backend only support load/store for i64 type, hence i64 is not legal for us.I guess Peter's Epiphany arch has similar situation.​ IIRC, LLVM expand load i64 to two load i32. Right now, we have to customlowering load i64 to load v2i32, then map v2i32 to the tuple register (similarto Sparc backend). How can we use the tuple register for those two i32? ​Any existing example? Regards,chenwj​ -- Wei-Ren Chen (陳韋任) Homepage: https://people.cs.nctu.edu.tw/~chenwj -------------- next part -------------- An...